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MC100EP809FAR2G Fiches technique(PDF) 7 Page - ON Semiconductor

No de pièce MC100EP809FAR2G
Description  3.3V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
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Fabricant  ONSEMI [ON Semiconductor]
Site Internet  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC100EP809FAR2G Fiches technique(HTML) 7 Page - ON Semiconductor

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MC100EP809
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Figure 4. LVPECL Differential Input Levels
GROUND
HSTL OUTPUT Q
Q
50 W
50 W
VIH(DIFF)
VIL(DIFF)
GND
VCCI(LVPECL)
VIH(DIFF)
VIL(DIFF)
GND
VCCO(HSTL)
Figure 5. HSTL Differential Input Levels
Figure 6. HSTL Output Termination and AC Test Reference
VIHCMR
VPP
VPP
VX
Z = 50 W
CLK
CLK
OE
Q
Q
CLK/CLK
D.C. Bias*
Figure 7. HSTL Single−Ended Input Configuration
*Must fall within 680 to 900 mV (Preferably (VIH + VIL)/2).
Figure 8. Output Enable (OE) Timing Diagram
VCCI


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