www.ti.com

TIMING REQUIREMENTS

SWITCHING CHARACTERISTICS

SN74ALVCH16903

3.3-V 12-BIT UNIVERSAL BUS DRIVER

WITH PARITY CHECKER AND DUAL 3-STATE OUTPUTS

SCES095D – MARCH 1997 – REVISED SEPTEMBER 2004

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 1 and

Figure 4)

± 0.2 V

± 0.3 V

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

Clock frequency

125

125

125

MHz

Pulse duration, CLK

↑

3

3

3

ns

1A–12A before CLK

↑

Register mode

1.7

1.9

1.45

1A–10A before CLK

↑

Buffer mode

5.9

5.2

4.4

Register mode

1.2

1.5

1.3

APAR before CLK

↑

Setup time

Buffer mode

4.6

3.6

3.1

ns

PARI/O before CLK

↑

Both modes

2.4

2

1.7

11A/YERREN before CLK

↑ Buffer mode

2

1.9

1.6

CLKEN before CLK

↑

Register mode

2.5

2.6

2.2

1A–12A after CLK

↑

Register mode

0.4

0.25

0.55

1A–10A after CLK

↑

Buffer mode

0.25

0.25

0.25

Register mode

0.7

0.4

0.7

APAR after CLK

↑

Buffer mode

0.25

0.25

0.25

Hold time

ns

Register mode

0.25

0.25

0.4

PARI/O after CLK

↑

Buffer mode

0.25

0.25

0.5

11A/YERREN after CLK

↑

Buffer mode

0.25

0.25

0.4

CLKEN after CLK

↑

Register mode

0.25

0.5

0.4

over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1 and Figure 4)

FROM

TO

± 0.2 V

± 0.3 V

PARAMETER

UNIT

(INPUT)

(OUTPUT)

MIN

MAX

MIN

MAX

MIN

MAX

125

125

125

MHz

Buffer mode

A

Y

1

4.4

4.2

1.1

3.8

YERR

1

5.7

4.9

1.4

4.4

ns

Both modes

CLK

PARI/O

1.2

8.6

7.9

1.7

6.6

Both modes

CLK

PARI/O

1

6.8

5.2

1.3

4.5

ns

Both modes

MODE

Y

1

5.9

5.8

1.3

4.9

ns

1

6.1

5.5

1.2

4.8

Register mode

CLK

Y

ns

1

5.9

4.9

1.2

4.6

OE

Y

1.1

6.5

6.4

1.4

5.4

Both modes

ns

PAROE

PARI/O

1

5.6

6

1

4.8

OE

Y

1

6.4

5.2

1.7

5

Both modes

ns

PAROE

PARI/O

1

3.2

3.8

1.2

3.8

1

3.6

4.2

1.9

4

Both modes

OE

YERR

ns

1.2

5.1

4.9

1.5

4.2

(1)

See Figure 2 and Figure 5 for the load specification.

6