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MC10E141FNR2G Fiches technique(PDF) 1 Page - ON Semiconductor

No de pièce MC10E141FNR2G
Description  5V ECL 8-Bit Shift Register
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Fabricant  ONSEMI [ON Semiconductor]
Site Internet  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 7
1
Publication Order Number:
MC10E141/D
MC10E141, MC100E141
5VECL 8-Bit Shift Register
Description
The MC10E/100E141 is an 8-bit full-function shift register. The
E141 performs serial/parallel in and serial/parallel out, shifting in
either direction. The eight inputs D0 − D7 accept parallel input data,
while DL/DR accept serial input data for left/right shifting. The Qn
outputs do not need to be terminated for the shift operation to function.
To minimize noise and power, any Q output not used should be left
unterminated.
The select pins, SEL0 and SEL1, select one of four modes of
operation: Load, Hold, Shift Left, Shift Right, according to the
Function Table.
Input data is accepted a set-up time before the positive clock edge. A
HIGH on the Master Reset (MR) pin asynchronously resets all the
registers to zero.
The 100 Series contains temperature compensation.
Features
700 MHz Min. Shift Frequency
8-Bit
Full-Function, Bi-Directional
Asynchronous Master Reset
Pin-Compatible with E241
PECL Mode Operating Range: VCC = 4.2 V to 5.7 V
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = −4.2 V to −5.7 V
Internal Input 50 kW Pulldown Resistors
ESD Protection: Human Body Model; > 2 kV,
Machine Model; > 200 V
Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level:
Pb = 1
Pb−Free = 3
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
Transistor Count = 565 devices
Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING DIAGRAM*
xxx
= 10 or 100
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G
= Pb−Free Package
PLCC−28
FN SUFFIX
CASE 776
MCxxxE141FNG
AWLYYWW
1
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION


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