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TPS2231 Fiches technique(PDF) 5 Page - Texas Instruments |
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TPS2231 Fiches technique(HTML) 5 Page - Texas Instruments |
5 / 35 page www.ti.com SWITCHING CHARACTERISTICS TPS2231 TPS2236 SLVS536E – JULY 2004 – REVISED SEPTEMBER 2006 ELECTRICAL CHARACTERISTICS (continued) T J = 25°C, VI(3.3VIN) = VI(AUXIN) = 3.3 V, VI(1.5VIN) = 1.5 V, VI(/SHDNx), VI(/STBYx) = 3.3 V, VI(/CPPEx) = VI(/CPUSBx) = 0 V, V I(/SYSRST) = 3.3 V, OCx and RCLKENx and PERSTx are open, all voltage outputs unloaded (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 3.3VOUT falling 2.7 3 PERST assertion threshold of output voltage (PERST asserted when any output voltage falls below the AUXOUT falling 2.7 3 V threshold) 1.5VOUT falling 1.2 1.35 3.3VOUT, AUXOUT, or 1.5VOUT PERST assertion delay from output voltage 500 ns falling 3.3VOUT, AUXOUT, and 1.5VOUT PERST de-assertion delay from output voltage 4 10 20 ms rising within tolerance Max time from SYSRST asserted or PERST assertion delay from SYSRST 500 ns de-asserted 3.3VOUT, AUXOUT, or 1.5VOUT tW(PERST) PERST minimum pulse width falling out of tolerance or triggered 100 250 µs by SYSRST PERST output low voltage 0.4 V IO(PERST) = 500 µA PERST output high voltage 2.4 V OC output low voltage IO(/OC) = 2 mA 0.4 V OC leakage current VO(/OC) = 3.6 V 1 µA Falling into or out of an overcurrent OC deglitch 6 20 mS condition UNDERVOLTAGE LOCKOUT (UVLO) 3.3VIN level, below which 3.3VIN 3.3VIN UVLO 2.6 2.9 and 1.5VIN switches are off 1.5VIN level, below which 3.3VIN 1.5VIN UVLO 1 1.25 V and 1.5VIN switches are off AUXIN level, below which all AUXIN UVLO 2.6 2.9 switches are off UVLO hysteresis 100 mV T J = 25°C, VI(3.3VIN) = VI(AUXIN) = 3.3 V, VI(1.5VIN) = 1.5 V, VI(/SHDNx), VI(/STBYx) = 3.3 V, VI(/CPPEx) = VI(/CPUSBx) = 0 V, V I(/SYSRST) = 3.3 V, OCx and RCLKENx and PERSTx are open, all voltage outputs unloaded (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 3.3VIN to 3.3VOUT CL(3.3VOUT) = 0.1 µF, IO(3.3VOUT) = 0 A 0.1 3 AUXIN to AUXOUT CL(AUXOUT) = 0.1 µF, IO(AUXOUT) = 0 A 0.1 3 1.5VIN to 1.5VOUT CL(1.5VOUT) = 0.1 µF, IO(1.5VOUT) = 0 A 0.1 3 tr Output rise times ms 3.3VIN to 3.3VOUT CL(3.3VOUT) = 100 µF, RL = VI(3.3VIN)/1 A 0.1 6 AUXIN to AUXOUT CL(AUXOUT) = 100 µF, RL = VI(AUXIN)/0.250 A 0.1 6 1.5VIN to 1.5VOUT CL(1.5VOUT) = 100 µF, RL = VI(1.5VIN)/0.500 A 0.1 6 3.3VIN to 3.3VOUT CL(3.3VOUT) = 0.1 µF, IO(3.3VOUT) = 0 A 10 150 AUXIN to VAUXOUT CL(AUXOUT) = 0.1 µF, IO(AUXOUT) = 0 A 10 150 µs Output fall times 1.5VIN to 1.5VOUT CL(1.5VOUT) = 0.1 µF, IO(1.5VOUT) = 0 A 10 150 when card removed tf (both CPUSB and 3.3VIN to 3.3VOUT CL(3.3VOUT) = 20 µF, IO(3.3VOUT) = 0 A 2 30 CPPE de-asserted) AUXIN to VAUXOUT CL(AUXOUT) = 20 µF, IO(AUXOUT) = 0 A 2 30 ms 1.5VIN to 1.5VOUT CL(1.5VOUT) = 20 µF, IO(1.5VOUT) = 0 A 2 30 5 Submit Documentation Feedback |
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