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BUK116-50S Fiches technique(PDF) 10 Page - NXP Semiconductors |
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BUK116-50S Fiches technique(HTML) 10 Page - NXP Semiconductors |
10 / 13 page Philips Semiconductors Product specification Logic level TOPFET BUK116-50L/S SMD version of BUK106-50L/S Fig.22. Input threshold voltage. V IS(TO) = f(Tj); conditions: ID = 1 mA; VDS = 5 V Fig.23. Typical DC protection supply characteristics. I PS = f(VPS); normal or overload operation; Tj = 25 ˚C Fig.24. Typical latched input characteristics, 25 ˚C. I ISL = f(VIS); after overload protection latched Fig.25. Typical reverse diode current, T j = 25 ˚C. I S = f(VSDS); conditions: VIS = 0 V; tp = 250 µs Fig.26. Normalised limiting clamping energy. E DSM% = f(Tmb); conditions: ID = 27 A Fig.27. Clamping energy test circuit, R IS = 100 Ω. -60 -40 -20 0 20 40 60 80 100 120 140 Tj / C VIS(TO) / V 2 1 0 max. typ. min. 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 VSD / V IS / A BUK116-50L/S 200 150 100 50 0 0 2 4 6 8 10 12 14 BUK116-50L/S VPS / V IPS / mA 1.0 0.5 0 0 20 40 60 80 100 120 140 Tmb / C EDSM% 120 110 100 90 80 70 60 50 40 30 20 10 0 0 2 4 6 8 10 VIS / V IISL / mA BUK116-50L/S 100 50 0 4 5 6 7 8 9 VPS / V = 11 150 10 L D.U.T. VDD RI = RIS R 01 VDS -ID/100 + - shunt VIS 0 ID 0 VDS 0 VDD V(CL)DSR D S I TOPFET P F P RF VPS + E DSM = 0.5 ⋅ LID 2 ⋅ V (CL)DSR/(V(CL)DSR − VDD) July 1996 10 Rev 1.000 |
Numéro de pièce similaire - BUK116-50S |
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Description similaire - BUK116-50S |
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