Moteur de recherche de fiches techniques de composants électroniques |
|
FWLXTPAD0QE001 Fiches technique(PDF) 1 Page - Intel Corporation |
|
FWLXTPAD0QE001 Fiches technique(HTML) 1 Page - Intel Corporation |
1 / 226 page Intel® LXT9785 and Intel® LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers Datasheet The Intel® LXT9785 and Intel® LXT9785E are 8-port Fast Ethernet PHY Transceivers supporting IEEE 802.3 physical layer applications at 10 Mbps and 100 Mbps. These devices provide Serial/Source Synchronous Serial Media Independent Interfaces (SMII/SS-SMII) and Reduced Media Independent Interface (RMII) for switching and other independent port applications. The LXT9785 and LXT9785E are identical except for the IP telephony features included in the LXT9785E transceiver. The LXT9785E is an enhanced version of the LXT9785 that detects Data Terminal Equipment (DTE) requiring power from the switch over a CAT5 cable. The system uses the information collected by the LXT97985E to apply power if the DTE at the far end requires power over the cable, such as an IP telephone. Each network port can provide a twisted-pair (TP) or Low-Voltage Positive Emitter Coupled Logic (LVPECL) interface. The twisted-pair interface supports 10 Mbps and 100 Mbps (10BASE-T and 100BASE-TX) Ethernet over twisted-pair. The LVPECL interface supports 100 Mbps (100BASE-FX) Ethernet over fiber-optic media. The LXT9785/LXT9785E provides three discrete LED driver outputs for each port. The devices support both half-duplex and full-duplex operation at 10 Mbps and 100 Mbps and require only a single 2.5 V power supply. Applications Product Features Enterprise switches IP telephony switches Storage Area Networks Multi-port Network Interface Cards (NICs) Eight IEEE 802.3-compliant 10BASE-T or 100BASE-TX ports with integrated filters. 100BASE-FX fiber-optic capability on all ports. 2.5 V operation. Low power consumption; 250 mW per port typical. Multiple RMII or SMII/SS-SMII ports for independent PHY port operation. Auto MDI/MDIX crossover capability. Proprietary Optimal Signal Processing™ architecture improves SNR by 3 dB over ideal analog filters. Optimized for dual-high stacked RJ-45 applications. MDIO sectionalization into 2x4 or 1x8 configurations. Supports both auto-negotiation systems and legacy systems without auto-negotiation capability. Robust baseline wander correction. Configurable through the MDIO port or external control pins. JTAG boundary scan. 208-pin PQFP: LXT9785HC, LXT9785EHC, LXT9785HE. 241-ball BGA: LXT9785BC, LXT9785EBC. 196-ball BGA: LXT9785MBC DTE detection for remote powering applications (LXT9785E only). Extended temperature operation of -40oC to +85oC (LXT9785HE). Document Number: 249241 Revision Number: 007 Revision Date: August 28, 2003 |
Numéro de pièce similaire - FWLXTPAD0QE001 |
|
Description similaire - FWLXTPAD0QE001 |
|
|
Lien URL |
Politique de confidentialité |
ALLDATASHEET.FR |
ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |