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CDB5530U Fiches technique(PDF) 3 Page - Cirrus Logic

No de pièce CDB5530U
Description  Evaluation Board and Software
Download  20 Pages
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Fabricant  CIRRUS [Cirrus Logic]
Site Internet  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CDB5530U Fiches technique(HTML) 3 Page - Cirrus Logic

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CDB5530U
DS742DB1
3
1. HARDWARE
1.1
Introduction
The CDB5530U evaluation board provides a quick means of evaluating the CS5530 Analog-to-Digital
Converter (ADC). The CS5530 is a highly integrated
∆Σ ADC which uses charge-balance techniques to
achieve 24-bit performance. The CS5530 includes a very low noise chopper-stabilized instrumentation
amplifier (12 nV/sqrt(Hz) @ 0.1 Hz) with a fixed gain of 64×. This ADC also includes a fourth-order
∆Σ
modulator followed by a digital filter which provides twenty selectable output word rates of 6.25 Hz,
7.5 Hz, 12.5 Hz, 15 Hz, 25 Hz, 30 Hz, 50 Hz, 60 Hz, 100 Hz, 120 Hz, 200 Hz, 240 Hz, 400 Hz, 480 Hz,
800 Hz, 960 Hz, 1.6 kHz, 1.92 kHz, 3.2 kHz and 3.84 kHz (XIN = 4.9152 MHz).
1.2
Evaluation Board Overview
The CDB5530U evaluation board is partitioned into two main sections — analog and digital. The analog
section consists of the CS5530 and a precision voltage reference. The digital section consists of the mi-
crocontroller, the reset circuitry, and the USB interface. The board also has power supply connections
which accommodate all of the various supply options of the CS5530.
The evaluation board’s analog section operates from either a single +5 V, dual ±2.5 V, or dual ±3 V power
supply. The evaluation board interfaces the CS5530 to an IBM® compatible PC with a USB interface. To
accomplish this, the board comes equipped with a microcontroller and a USB cable which physically in-
terfaces the evaluation board to the PC. The software provides easy access to the internal registers of the
CS5530, and provides a means to display and evaluate the performance of the ADC in the time domain
or the frequency domain.
1.2.1
Analog Section
The CS5530 is a high-precision
∆Σ converter designed to accurately measure one fully differential analog
voltage input while operating from a 4.9152 MHz crystal.
The evaluation board provides screw terminals labeled AIN1+ & AIN1- to connect input signals to the sin-
gle input channel. The sensor’s output is filtered by a simple RC network at the channel input to reduce
any interference picked up by the input leads. The 3 dB corner of the filter is approximately 52 kHz, differ-
ential and 56 kHz, common mode. Figure 1 illustrates the schematic of the analog section.
The evaluation board provides three voltage reference options for VREF+ and VREF-. The three refer-
ence options for VREF+ include: VA+, the on-board LT1019 voltage reference, and external input (J12).
Table 1 illustrates the options available. With the J17 jumper in the VA+ position, the reference is supplied
by the VA+ analog supply. With the J17 jumper in the LT1019 position, the LT1019 provides a +2.5 V ref-
erence (the LT1019 was chosen for its low drift, typically 5ppm/°C). By setting the J17 jumper to the
VREF+ position, the user can supply an external voltage reference to J12’s VREF+ input.
The three reference options for VREF- include: VA-, GND, and external input (J12). Table 2 illustrates the
options available. With the J18 jumper in the VA- position, the reference is supplied by the VA- analog
supply. With the J18 jumper in the GND position, the VREF- pin is connected to the board ground. By
setting the J18 jumper to the VREF- position, the user can supply an external voltage reference to J12’s
VREF- input.


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