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M25PE80 Fiches technique(PDF) 42 Page - STMicroelectronics

No de pièce M25PE80
Description  8 Mbit, low-voltage, Page-Erasable Serial Flash memory with Byte alterability, 50MHz SPI bus, standard pinout
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M25PE80 Fiches technique(HTML) 42 Page - STMicroelectronics

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Instructions
M25PE80
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6.16
Deep Power-down (DP)
Executing the Deep Power-down (DP) instruction is the only way to put the device in the
lowest consumption mode (the Deep Power-down mode). It can also be used as an extra
software protection mechanism, while the device is not in active use, since in this mode, the
device ignores all Write, Program and Erase instructions.
Driving Chip Select (S) High deselects the device, and puts the device in the Standby mode
(if there is no internal cycle currently in progress). But this mode is not the Deep Power-
down mode. The Deep Power-down mode can only be entered by executing the Deep
Power-down (DP) instruction, subsequently reducing the standby current (from ICC1 to ICC2,
as specified in Table 20).
Once the device has entered the Deep Power-down mode, all instructions are ignored
except the Release from Deep Power-down (RDP) instruction. Issuing the Release from
Deep Power-down (RDP) instruction will cause the device to exit the Deep Power-down
mode.
The Deep Power-down mode automatically stops at Power-down, and the device always
Powers-up in the Standby mode.
The Deep Power-down (DP) instruction is entered by driving Chip Select (S) Low, followed
by the instruction code on Serial Data Input (D). Chip Select (S) must be driven Low for the
entire duration of the sequence.
The instruction sequence is shown in Figure 22.
Chip Select (S) must be driven High after the eighth bit of the instruction code has been
latched in, otherwise the Deep Power-down (DP) instruction is not executed. As soon as
Chip Select (S) is driven High, it requires a delay of tDP before the supply current is reduced
to ICC2 and the Deep Power-down mode is entered.
Any Deep Power-down (DP) instruction, while an Erase, Program or Write cycle is in
progress, is rejected without having any effects on the cycle that is in progress.
Figure 22.
Deep Power-down (DP) instruction sequence
C
D
AI03753D
S
2
1
34567
0
tDP
Deep Power-down Mode
Stand-by Mode
Instruction


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