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74HCT161PW Fiches technique(PDF) 4 Page - NXP Semiconductors |
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74HCT161PW Fiches technique(HTML) 4 Page - NXP Semiconductors |
4 / 12 page December 1990 4 Philips Semiconductors Product specification Presettable synchronous 4-bit binary counter; asynchronous reset 74HC/HCT161 FUNCTION TABLE Note 1. The TC output is HIGH when CET is HIGH and the counter is at terminal count (HHHH). H = HIGH voltage level h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition L = LOW voltage level I = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition q = lower case letters indicate the state of the referenced output one set-up time prior to the LOW-to-HIGH CP transition X = don’t care ↑ = LOW-to-HIGH CP transition OPERATING MODE INPUTS OUTPUTS MR CP CEP CET PE Dn Qn TC reset (clear) L X X X X X L L parallel load H H ↑ ↑ X X X X I I I h L H L (1) count H ↑ h h h X count (1) hold (do nothing) H H X X I X X I h h X X qn qn (1) L Fig.4 Functional diagram. |
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