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74HCT1G126GW Fiches technique(PDF) 8 Page - NXP Semiconductors |
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74HCT1G126GW Fiches technique(HTML) 8 Page - NXP Semiconductors |
8 / 12 page 2002 May 15 8 Philips Semiconductors Product specification Bus buffer/line driver; 3-state 74HC1G126; 74HCT1G126 AC WAVEFORMS handbook, halfpage MNA121 A input Y output tPHL tPLH GND VI VM VM Fig.5 The input (A) to output (Y) propagation delays. For HC1G: VM = 50%; VI = GND to VCC For HCT1G: VM = 1.3 V; VI = GND to 3.0 V. handbook, full pagewidth MNA129 tPLZ tPHZ output disabled output enabled VOH −0.3 V VOL +0.3 V output enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH OE input VI VCC VM GND GND tPZL tPZH VM VM Fig.6 The 3-state enable and disable times. For HC1G: VM = 50%; VI = GND to VCC For HCT1G: VM = 1.3 V; VI = GND to 3.0 V. |
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