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74F670 Fiches technique(PDF) 6 Page - NXP Semiconductors |
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74F670 Fiches technique(HTML) 6 Page - NXP Semiconductors |
6 / 12 page Philips Semiconductors Product specification 74F670 4 x 4 register file (3-State) 1990 Jul 12 6 of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. AC ELECTRICAL CHARACTERISTICS LIMITS TEST Tamb= +25°C V =+5 0V Tamb = 0°C to +70°C V =+5 0V ± 10% SYMBOL PARAMETER TEST CONDITION VCC = +5.0V CL = 50pF, VCC = +5.0V ± 10% CL = 50pF, UNIT CONDITION CL = 50pF, RL = 500Ω CL = 50pF, RL = 500Ω MIN TYP MAX MIN MAX tPLH tPHL Propagation delay RA, RB to Qn Waveform 3, 4 3.5 4.0 5.5 5.5 9.0 8.5 3.0 3.5 10.0 9.9 ns ns tPLH tPHL Propagation delay WE to Qn Waveform 1, 2 5.0 6.5 7.0 8.5 10.0 11.5 4.5 6.0 11.0 12.5 ns ns tPLH tPHL Propagation delay Dn to Qn Waveform 1, 2 3.5 6.0 6.0 8.0 8.5 11.0 3.0 5.5 9.5 12.5 ns ns tPZH tPZL RE Enable time Qn to High or Low level Waveform 5 Waveform 6 3.0 4.5 7.0 6.5 12.0 9.0 2.5 4.0 13.0 10.0 ns ns tPHZ tPLZ RE Disable time Qn to High or Low level Waveform 5 Waveform 6 2.0 3.0 3.0 5.0 6.5 8.5 1.5 3.0 7.5 8.5 ns ns AC SETUP REQUIREMENTS LIMITS Tamb = +25°C Tamb = 0°C to +70°C SYMBOL PARAMETER TEST CONDITION VCC = +5.0V VCC = +5.0V ± 10% UNIT CL = 50pF, RL = 500Ω CL = 50pF, RL = 500Ω MIN TYP MAX MIN MAX ts(H) ts(L) Setup time, High or Low Dn to positive going WE Waveform 3, 4 1.5 6.0 1.5 7.0 ns ns th(H) th(L) Hold time, High or Low Dn to positive going WE Waveform 3, 4 0 1.0 0 1.0 ns ns ts(H) ts(L) Setup time, High or Low WA, WB to negative going WE1 Waveform 3, 4 0 0 0 0 ns ns th(H) th(L) Hold time, High or Low WA, WB to negative going WE1 Waveform 3, 4 0 0 0 0 ns ns tw(L) WE Pulse width, Low Waveform 3, 4 6.5 8.5 ns NOTES: 1. Write Address (WA, WB) setup time will protect the data written into the previous address. If protection of data in the previous address is not required, setup time for Write Address to WE can be ignored. Any address selection sustained for the final 7ns of the WE pulse during hold time for Write Address to WE will result in data being written into that location. |
Numéro de pièce similaire - 74F670 |
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Description similaire - 74F670 |
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