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74ABT845 Fiches technique(PDF) 5 Page - NXP Semiconductors

No de pièce 74ABT845
Description  8-bit bus interface latch with set and reset 3-State
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Fabricant  PHILIPS [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74ABT845 Fiches technique(HTML) 5 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74ABT845
8-bit bus interface latch with set and reset
(3-State)
1995 Sep 06
5
AC CHARACTERISTICS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
LIMITS
SYMBOL
PARAMETER
WAVEFORM
Tamb = +25oC
VCC = +5.0V
Tamb = -40 to
+85oC
VCC = +5.0V ±0.5V
UNIT
Min
Typ
Max
Min
Max
tPLH
tPHL
Propagation delay
Dn to Qn
1
1.0
2.2
3.9
5.4
5.4
6.8
1.0
2.2
6.2
7.8
ns
tPLH
tPHL
Propagation delay
LE to Qn
2
2.0
2.8
5.1
6.4
6.6
7.9
2.0
2.8
7.5
8.9
ns
tPLH
tPHL
Propagation delay
PRE to Qn
1
2.2
3.0
4.9
5.3
6.6
6.8
2.2
3.0
7.8
7.4
ns
tPLH
tPHL
Propagation delay
MR to Qn
1
2.4
3.1
4.9
5.9
6.4
7.3
2.4
3.1
7.3
8.5
ns
tPZH
tPZL
Output enable time
OEn to Qn
4
5
1.0
2.0
3.8
4.7
5.4
6.1
1.0
2.0
6.3
6.7
ns
tPHZ
tPLZ
Output disable time
OEn to Qn
4
5
1.9
2.2
4.6
4.7
6.2
6.4
1.9
2.2
7.2
7.0
ns
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
LIMITS
SYMBOL
PARAMETER
WAVEFORM
Tamb = +25oC
VCC = +5.0V
Tamb = -40 to +85oC
VCC = +5.0V ±0.5V
UNIT
Min
Typ
Min
ts(H)
ts(L)
Setup time, High or Low
Dn to LE
3
2.8
3.5
1.0
1.4
2.8
3.5
ns
th(H)
th(L)
Hold time, High or Low
Dn to LE
3
1.0
1.0
–1.2
–0.6
1.0
1.0
ns
tw(H)
LE pulse width, High
3
3.0
1.5
3.0
ns
tw(L)
PRE pulse width, Low
6
3.5
2.0
3.5
ns
tw(L)
MR pulse width, Low
6
2.8
1.3
2.8
ns
trec
PRE recovery time
6
3.0
1.4
3.0
ns
trec
MR recovery time
6
3.4
1.6
3.4
ns


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