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AM42DL1644DT85IT Fiches technique(PDF) 11 Page - SPANSION

No de pièce AM42DL1644DT85IT
Description  Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
Download  61 Pages
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AM42DL1644DT85IT Fiches technique(HTML) 11 Page - SPANSION

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10
Am42DL16x4D
January 9, 2002
P R E L IMINARY
DEVICE BUS OPERATIONS
This section describes the requirements and use of
the device bus operations, which are initiated through
the internal command register. The command register
itself does not occupy any addressable memory loca-
ti on. The r egi s t er i s a la tc h us ed to s t or e the
commands, along with the address and data informa-
tion needed to execute the command. The contents of
the register serve as inputs to the internal state ma-
chine. The state machine outputs dictate the function
of the device. Table 1 lists the device bus operations,
the inputs and control levels they require, and the re-
sulting output. The following subsections describe
each of these operations in further detail.


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