Moteur de recherche de fiches techniques de composants électroniques
  French  ▼
ALLDATASHEET.FR

X  

GS8182Q18D-133 Fiches technique(PDF) 6 Page - GSI Technology

No de pièce GS8182Q18D-133
Description  18Mb Burst of 2 SigmaQuad-II SRAM
Download  28 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricant  GSI [GSI Technology]
Site Internet  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS8182Q18D-133 Fiches technique(HTML) 6 Page - GSI Technology

Back Button GS8182Q18D-133 Datasheet HTML 2Page - GSI Technology GS8182Q18D-133 Datasheet HTML 3Page - GSI Technology GS8182Q18D-133 Datasheet HTML 4Page - GSI Technology GS8182Q18D-133 Datasheet HTML 5Page - GSI Technology GS8182Q18D-133 Datasheet HTML 6Page - GSI Technology GS8182Q18D-133 Datasheet HTML 7Page - GSI Technology GS8182Q18D-133 Datasheet HTML 8Page - GSI Technology GS8182Q18D-133 Datasheet HTML 9Page - GSI Technology GS8182Q18D-133 Datasheet HTML 10Page - GSI Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 28 page
background image
Preliminary
GS8182Q18D-200/167/133
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.02 11/2004
6/28
© 2003, GSI Technology
Burst of 2 SigmaQuad-II SRAM DDR Write
The write port samples the status of the W pin at each rising edge of K and the Address Input pins on the following rising edge of
K. A low on the Write Enable-bar pin, W, begins a write cycle. The first of the data-in pairs associated with the write command is
clocked in with the same rising edge of K used to capture the write command. The second of the two data in transfers is captured on
the rising edge of K along with the write address. A high on W causes a write port deselect cycle.
Burst of 2 Double Data Rate SigmaQuad-II SRAM Write First
Special Functions
Byte Write Control
Byte Write Enable pins are sampled at the same time that Data In is sampled. A high on the Byte Write Enable pin associated with
a particular byte (e.g., BW0 controls D0–D8 inputs) will inhibit the storage of that particular byte, leaving whatever data may be
stored at the current address at that byte location undisturbed. Any or all of the Byte Write Enable pins may be driven high or low
during the data in sample times in a write sequence.
Each write enable command and write address loaded into the RAM provides the base address for a 2 beat data transfer. The x18
version of the RAM, for example, may write 36 bits in association with each address loaded. Any 9-bit byte may be masked in any
write sequence.
Write A
Read B
Read C Write D
NOP
Read E Write F
Read G Write H
NOP
A
B
C
D
E
F
G
H
A
A+1
D
D+1
F
F+1
H
H+1
B
B+1
C
C+1
E
E+1
G
K
K
Address
R
W
BWx
D
C
C
Q
CQ
CQ


Numéro de pièce similaire - GS8182Q18D-133

FabricantNo de pièceFiches techniqueDescription
logo
GSI Technology
GS8182Q18BD-300M GSI-GS8182Q18BD-300M Datasheet
446Kb / 35P
   18Mb SigmaQuad-IITM Burst of 2 SRAM
More results

Description similaire - GS8182Q18D-133

FabricantNo de pièceFiches techniqueDescription
logo
GSI Technology
GS8182D19BD-375I GSI-GS8182D19BD-375I Datasheet
554Kb / 27P
   18Mb SigmaQuad-II Burst of 4 SRAM
GS8180QV18BD-167 GSI-GS8180QV18BD-167 Datasheet
414Kb / 28P
   18Mb Burst of 2 SigmaQuad SRAM
GS8180QV18BD-200 GSI-GS8180QV18BD-200 Datasheet
414Kb / 28P
   18Mb Burst of 2 SigmaQuad SRAM
GS8182D19BD-435I GSI-GS8182D19BD-435I Datasheet
554Kb / 27P
   18Mb SigmaQuad-II Burst of 4 SRAM
GS8180QV36BD-200I GSI-GS8180QV36BD-200I Datasheet
414Kb / 28P
   18Mb Burst of 2 SigmaQuad SRAM
GS8180QV18BD-200I GSI-GS8180QV18BD-200I Datasheet
414Kb / 28P
   18Mb Burst of 2 SigmaQuad SRAM
GS8180QV18BGD-167 GSI-GS8180QV18BGD-167 Datasheet
414Kb / 28P
   18Mb Burst of 2 SigmaQuad SRAM
GS8180QV18BGD-167I GSI-GS8180QV18BGD-167I Datasheet
414Kb / 28P
   18Mb Burst of 2 SigmaQuad SRAM
GS8182D37BD-435 GSI-GS8182D37BD-435 Datasheet
554Kb / 27P
   18Mb SigmaQuad-II Burst of 4 SRAM
GS8182D19BGD-333 GSI-GS8182D19BGD-333 Datasheet
554Kb / 27P
   18Mb SigmaQuad-II Burst of 4 SRAM
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28


Fiches technique Télécharger

Go To PDF Page


Lien URL




Politique de confidentialité
ALLDATASHEET.FR
ALLDATASHEET vous a-t-il été utile ?  [ DONATE ] 

À propos de Alldatasheet   |   Publicité   |   Contactez-nous   |   Politique de confidentialité   |   Echange de liens   |   Fabricants
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com