GS882V37AB/D-250/225/200

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Rev: 1.02 7/2004

4/28

© 2002, GSI Technology

GS882V37A BGA Pin Description

Symbol

Type

Description

I

Address field LSBs and Address Counter Preset Inputs

A

I

Address Inputs

I/O

Data Input and Output pins

I

NC

—

No Connect

CK

I

Clock Input Signal; active high

BW

I

Byte Write—Writes all enabled bytes; active low

GW

I

Global Write Enable—Writes all bytes; active low

I

Chip Enable; active low

G

I

Output Enable; active low

ADV

I

Burst address counter advance enable; active low

ADSP, ADSC

I

Address Strobe (Processor, Cache Controller); active low

ZZ

I

Sleep Mode control; active high

LBO

I

Linear Burst Order mode; active low

SCD

I

Single Cycle Deselect/Dual Cycle Deselect Mode Control

PE

I

9th Bit Enable; active low (High = x16/32 Mode, Low = x18/36 Mode)

ZQ

I

FLXDrive Output Impedance Control

(Low = Low Impedance [High Drive], High = High Impedance [Low Drive])

TMS

I

Scan Test Mode Select

TDI

I

Scan Test Data In

TDO

O

Scan Test Data Out

TCK

I

Scan Test Clock

I

Core power supply

I

I/O and Core Ground

I

Output driver power supply

—

or

Do Not Use (must be left floating)