Philips Semiconductors

Product specification

74ABT16260

74ABTH16260

12-bit to 24-bit multiplexed D-type latches (3-State)

1998 Feb 10

8

AC WAVEFORMS

The outputs are measured one at a time with one transition per measurement.

3V

0V

INPUT

SA00437

Figure 1. Pulse duration

3V

0V

INPUT

OUTPUT

OUTPUT

SA00438

All input pulses are supplied by generators having the following

characteristics: PRR

Figure 2. Propagation delay times;

inverting and non-inverting outputs

3V

0V

DATA INPUT

0V

3V

TIMING INPUT

SA00439

Figure 3. Setup and hold times

3V

0V

OUTPUT

CONTROL

3.5V

≈0V

OUTPUT

WAVEFORM 1

S1 AT 7V

OUTPUT

WAVEFORM 2

S1 AT OPEN

SA00440

Waveform 1 is for an output with internal conditions such that the

output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the

output is high except when disabled by the output control.

Figure 4. Enable and disable times;

low- and high-level enabling

TEST LOAD CIRCUIT

(INCLUDES PROBE AND

JIG CAPACITANCE)

500

Ω

500

Ω

FROM OUTPUT UNDER TEST

S1

7V

OPEN

GND

Load Circuit for Outputs

TEST

S1

Open

7V

Open

SA00441

Figure 5. Test load circuit