MRD520A datasheet(4/9 Pages) ETC1

No de pièce	MRD520A

Description	1.2um CMOS integrated circuit for purpose of amplification

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Fabricant	ETC1 [List of Unclassifed Manufacturers]

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Uniform Industrial Corp.

MRD520A

Dual Channel F2F Decoder IC

Page :

October, 1997

2

4. PIN DESCRIPTION

1

GND

2

SEN1N

Input from magnetic head

3

SEN1P

Input from magnetic head

4

OP1OUT

Amplifier OP1 output

5

OP2NIN

Amplifier OP2 - input

6

OP2OUT

Amplifier OP2 output

7

OP3OUT

Amplifier OP3 output

8

OP6OUT

Amplifier OP6 output

9

OP5OUT

Amplifier OP5 output

10

OP5NIN

Amplifier OP5 - input

11

OP4OUT

Amplifier OP4 output

12

SEN2P

Amplifier OP4 + input

13

SEN2N

Amplifier OP4 - input

14

VREFIN

Reference voltage for analog signal processing

15

VDD

16

ADJ2

Adjust read out clock pulse width for F2F channel 2

17

OUT2

Positive read out data for F2F channel 2

18

OUT2X

Negative read out data for F2F channel 2

19

OCK2

Negative read out clock for F2F channel 2

20

OSCI

RC oscillator input

21

OSCO

RC oscillator output

22

IBS

Select ignore leading bit, “LOW” for 4 bits and “HIGH” for 8 bits

23

OCK1

Negative read out clock for F2F channel 1

24

OUT1X

Negative read out data for F2F channel 1

25

OUT1

Positive read out data for F2F channel 1

26

CLS

Card Loading Signal output, “LOW” after ignore bits,

“HIGH” if no input for around 12.5mS

27

ADJ1

Adjust read out clock pulse width for F2F channel 1

28

RES

Power on reset, LOW reset the logic circuit and enter idle mode.

Approx. 10mS after HIGH level to normal function

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MRD520A Fiches technique(PDF) 4 Page - List of Unclassifed Manufacturers

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