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SN74AUC1G80DCKR Fiches technique(PDF) 1 Page - Texas Instruments |
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SN74AUC1G80DCKR Fiches technique(HTML) 1 Page - Texas Instruments |
1 / 12 page SN74AUC1G80 SINGLE POSITIVEEDGETRIGGERED DTYPE FLIPFLOP SCES388H − MARCH 2002 − REVISED FEBRUARY 2004 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Available in the Texas Instruments NanoStar and NanoFree Packages D Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation D Ioff Supports Partial-Power-Down Mode Operation D Sub 1-V Operable D Max tpd of 1.9 ns at 1.8 V D Low Power Consumption, 10-µA Max ICC D ±8-mA Output Drive at 1.8 V D Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) description/ordering information This single positive-edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation. When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING‡ NanoStar WCSP (DSBGA) − YEA Tape and reel SN74AUC1G80YEAR _ _ _UX_ −40 °C to 85°C NanoFree WCSP (DSBGA) − YZA (Pb-free) Tape and reel SN74AUC1G80YZAR _ _ _UX_ SOT (SOT-23) − DBV Tape and reel SN74AUC1G80DBVR U80_ SOT (SC-70) − DCK Tape and reel SN74AUC1G80DCKR UX_ † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. ‡ DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site. YEA/YZA: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Copyright 2004, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. DBV OR DCK PACKAGE (TOP VIEW) 1 2 3 5 4 D CLK GND VCC Q 3 2 1 4 5 GND CLK D Q VCC YEA OR YZA PACKAGE (BOTTOM VIEW) PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. NanoStar and NanoFree are trademarks of Texas Instruments. |
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