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M64811AGP Datasheet(Fiches technique) 4 Page - Mitsubishi Electric Semiconductor

Numéro de pièce M64811AGP
Description  1.1GHz/500MHz DUAL PLL FREQUENCY SYNTHESIZER FOR DIGITAL CELLULAR PHONE
Télécharger  9 Pages
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Fabricant  MITSUBISHI [Mitsubishi Electric Semiconductor]
Site Internet  http://www.mitsubishichips.com
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1.1GHz/500MHz DUAL PLL FREQUENCY SYNTHESIZER FOR DIGITAL CELLULAR PHONE
M64811AGP
MITSUBISHI ICs (COMMUNICATION)
MSB
MSB
MSB
3.Bit Configuration of Shift Register
Shift register
Data latch
setting
Power on/off
setting
2
0
FUNCTION DESCRIPTION
1.Data Input
Note 1)
At the leading edge of the CPS input , the status of the SI input is written into the shift
register .
Note 2)
The bit just before LE becomes "H" is LSB , and SI before MSB becomes invalid .
Note 3)
When LE is "H" , the data stored in the shift registers is loaded into the appropriate latch .
2.Input Signal Timing
Valid
data
L
E
MSB
LSB
10
Dividing ratio of reference counter
for reference frequency
Dividing ratio of
swallow counter
Dividing ratio of programable counter
for local oscillator 1
Dividing ratio of programable counter
for local oscillator 2
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
LSB
*
Invalid
Invalid
Invalid
Invalid
Dividing ratio of
swallow counter
S
I
CPS
L
E
S
I
CPS
D1
D2
D19
D20
D21 D22
tsu
th
tCR
tRH
tWH
tWL
tsu=th=tWH=tWL=0.1
µsmin.
tCR=tRH=0.1
µsmin.
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
DA
DB
DC
DD
DE
2
0
2
1
2
2
2
3
2
4
2
0
2
10
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
2
11
2
0
2
1
2
2
2
3
2
0
2
10
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
2
11
2
12
**
**
*
**
*
HH
LH
HL
2
4




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