SN74HC74Q1

DUAL DTYPE POSITIVEEDGETRIGGERED FLIPFLOP

WITH CLEAR AND PRESET

SCLS577 − MARCH 2004

2

POST OFFICE BOX 655303

logic diagram (positive logic)

PRE

CLK

D

CLR

Q

Q

C

C

C

C

C

C

C

C

C

C

TG

TG

TG

TG

−0.5 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±20 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±20 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±25 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance,

86

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package

113

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

−65

°C to 150°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions (see Note 3)

MIN

NOM

MAX

UNIT

VCC

Supply voltage

2

5

6

V

VCC = 2 V

1.5

VIH

High-level input voltage

VCC = 4.5 V

3.15

V

VIH

High-level input voltage

VCC = 6 V

4.2

V

VCC = 2 V

0.5

VIL

Low-level input voltage

VCC = 4.5 V

1.35

V

VIL

Low-level input voltage

VCC = 6 V

1.8

V

VI

Input voltage

0

VCC

V

VO

Output voltage

0

VCC

V

VCC = 2 V

1000

∆t/∆v

Input transition rise/fall time

VCC = 4.5 V

500

ns

∆t/∆v

Input transition rise/fall time

VCC = 6 V

400

ns

TA

Operating free-air temperature

−40

125

°C

NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.