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UC62LV1024JC-70 Fiches technique(PDF) 1 Page - List of Unclassifed Manufacturers

No de pièce UC62LV1024JC-70
Description  Low Power CMOS SRAM
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UC62LV1024JC-70 Fiches technique(HTML) 1 Page - List of Unclassifed Manufacturers

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Low Power CMOS SRAM
64K X 16
UC62LV1024
-55/-70
Features:
• Vcc operation voltage :
1.5 V~ 3.6V
• Low power consumption :
15mA (Max.) operating current
1uA (Typ.) CMOS standby current
• High Speed Access time :
70ns (Max.) at Vcc = 1.5V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Data retention supply voltage as low as 1.2V
• Easy expansion with CE\ and OE\ options
Description
The UC62LV1024 is a high performance, low power
CMOS Static Random Access Memory organized as 65,536
words by 16 and operates from 1.5 V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide
both high speed and low power features with a typical CMOS
standby current of 1uA and maximum access time of 70ns in
1.5V operation.
Easy memory expansion is provided enable (CE\), and
active LOW output enable (OE\) and three-state output
drivers.
The UC62LV1024 has an automatic power down feature,
reducing the power consumption significantly when chip is
deselected.
The US62LV1024 is available in the JEDEC standard 44
pin TSOP (Type II) and 48 pin mini-BGA.
PRODUCT FAMILY
Power Consumption
Speed
(ns)
STANDBY
Operating
Product Family
Operating
Tempature
Vcc Range
Vcc=1.5V(Max.)
Vcc=3.3V(Typ.)
Vcc=3.6V(Max.)
Package
Type
UC62LV1024JC
TSOP-44
UC62LV1024KC
BGA-48
UC62LV1024AC
0
~ 70
℃℃
1.5V ~ 3.6V
55/70
1uA
15mA
DICE
UC62LV1024JI
TSOP-44
UC62LV1024KI
BGA-48
UC62LV1024AI
-40
~
85℃
1.5V ~ 3.6V
55/70
1uA
15mA
DICE
PIN CONFIGURATIONS
A4
1
A3
2
A2
3
A1
4
A0
5
CE
6
DQ0
7
DQ1
8
DQ2
9
DQ3
10
11
GND
12
DQ4
13
DQ5
14
DQ6
15
DQ7
16
WE
17
18
A15
19
A14
20
A13
21
A12
22
A5
44
A6
43
A7
42
OE
41
UB
40
LB
39
DQ15
38
DQ14
37
DQ13
36
DQ12
35
GND
34
VCC
33
DQ11
32
DQ10
31
DQ9
30
DQ8
29
NC
28
A8
27
A9
26
A10
25
A11
24
NC
23
UC62LV1024JC
LB
OE
A0
A1
A2
NC
DQ8
UB
A3
A4
CE
DQ0
DQ9
DQ10
A5
A6
DQ1
DQ2
GND
DQ11
NC
A7
DQ3
VCC
VCC
DQ12
NC
NC
DQ4
GND
DQ14
DQ13
A14
A15
DQ5
DQ6
DQ15
NC
A12
A13
WE
DQ7
NC
A8
A9
A10
A11
NC
VCC
NC
UC62LV1024JI
BLOCK DIAGRAM
MEMORY ARRAY
64K X 16 Bits
COLUMN DECODER
SENSE AMPLIFIER
&
WRITE DRIVER
I/O BUFFER
X16
COL
Address
ROW
Address
CE
WE
OE
CE
WE
OE
DQ0 ~ DQ15
UB
LB
UB
LB
U-Chip Technology Corp. LTD.
Preliminary
Rev. 1.0
Reserves the right to modify document contents without notice.
PAGE
1


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