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GS72108ATP-10 Fiches technique(PDF) 6 Page - List of Unclassifed Manufacturers

No de pièce GS72108ATP-10
Description  256K x 8 2Mb Asynchronous SRAM
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GS72108ATP/J
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.05 10/2004
6/12
© 2001, GSI Technology
AC Characteristics
* These parameters are sampled and are not 100% tested.
Read Cycle 1: CE = OE = VIL, WE = VIH
Read Cycle
Parameter
Symbol
-7
-8
-10
-12
Unit
Min
Max
Min
Max
Min
Max
Min
Max
Read cycle time
tRC
7
8
10
12
ns
Address access time
tAA
7
8
10
12
ns
Chip enable access time (CE)tAC
7
8
10
12
ns
Byte enable access time (UB, LB)tAB
—3—
3.5
4
5
ns
Output enable to output valid (OE)tOE
3
3.5
4
5
ns
Output hold from address change
tOH
3
3
3
3
ns
Chip enable to output in low Z (CE)
tLZ*
3
3
3
3
ns
Output enable to output in low Z (OE)
tOLZ*
0
0
0
0
ns
Byte enable to output in low Z (UB, LB)
tBLZ*
0
0
0
0
ns
Chip disable to output in High Z (CE)
tHZ*
3.5
4
5
6
ns
Output disable to output in High Z (OE)
tOHZ*
3
3.5
4
5
ns
tAA
tOH
tRC
Address
Data Out
Previous Data
Data valid


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