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Moteur de recherche de fiches techniques de composants électroniques |
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LM3370 Datasheet(Fiches technique) 6 Page - National Semiconductor (TI) |
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6 page ![]() Electrical Characteristics (Notes 2, 8, 10)Typical limits appearing in normal type apply for T J = 25˚C. Limits appearing in boldface type apply over the entire junction temperature range (T A =TJ = −30˚C to +85˚C). Unless otherwise noted, V IN1 =VIN2 = 3.6V. (Continued) Note 6: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be de-rated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125 oC), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to-ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA-MAX =TJ-MAX-OP –(θJA xPD-MAX). Note 7: Junction-to-ambient thermal resistance ( θJA) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the JEDEC standard JESD51-7. The test board is a 4-layer FR-4 board measuring 102 mm x 76 mm x 1.6 mm witha2x1 array of thermal vias. Thickness of copper layers are 2/1/1/2oz. Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues in board design. The value of θJA of this product can vary significantly, depending on PCB material, layout, and environmental conditions. In applications where high maximum power dissipation exists (high VIN, high IOUT), special care must be paid to thermal dissipation issues. For more information on these topics, please refer to Application Note 1187: Leadless Leadframe Package (LLP) and the Power Efficiency and Power Dissipation section of this datasheet. Note 8: Min. and Max are guaranteed by design, test and/or statistical analysis. All electrical characteristics having room-temperature limits are tested during production with TJ = 25˚C. All hot and cold limits are guaranteed by correlating the electrical characteristics to process and temperature variations and applying statistical process control. Note 9: Guaranteed by design. Note 10: Input voltage range for all voltage options is 2.7V to 5.5V. The voltage range recommended for the specified output voltages: VIN = 2.7V to 5.5V for 1V ≤ VOUT ≤ 1.7V and for VOUT = 1.8V or greater, VIN =VOUT +1V or VIN,MIN =ILOAD *(RDSON_PFET +RDCR_INDUCTOR)+VOUT Note 11: Test condition: for VOUT less than 2.5V, VIN = 3.6V; for VOUT greater than or equal to 2.5V, VIN =VOUT +1V www.national.com 6 |