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74V2G04STR Fiches technique(PDF) 1 Page - STMicroelectronics |
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74V2G04STR Fiches technique(HTML) 1 Page - STMicroelectronics |
1 / 7 page 1/7 June 2003 s HIGH SPEED: tPD = 3.8ns (TYP.) at VCC =5V s LOW POWER DISSIPATION: ICC =1µA(MAX.) at TA =25°C s HIGH NOISE IMMUNITY: VNIH =VNIL = 28% VCC (MIN.) s POWER DOWN PROTECTION ON INPUT s SYMMETRICAL OUTPUT IMPEDANCE: |IOH|= IOL =8mA (MIN) at VCC =4.5V s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74V2G04 is an advanced high-speed CMOS TRIPLE INVERTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on input and 0 to 7V can be accepted on input with no regard to the supply voltage. This device can be used to interface5V to3V. 74V2G04 TRIPLE INVERTER PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE T & R SOT23-8L 74V2G04STR SOT23-8L |
Numéro de pièce similaire - 74V2G04STR |
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Description similaire - 74V2G04STR |
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