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TDA8261TW Fiches technique(PDF) 10 Page - NXP Semiconductors |
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TDA8261TW Fiches technique(HTML) 10 Page - NXP Semiconductors |
10 / 22 page 2004 Dec 02 10 Philips Semiconductors Product specification Satellite Zero-IF QPSK/8PSK downconverter with PLL synthesizer TDA8261TW LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); note 1. Note 1. Maximum ratings cannot be exceeded, not even momentarily without causing irreversible damages to the TDA8261TW. Maximum ratings cannot be accumulated. THERMAL CHARACTERISTICS HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be completely safe, it is desirable to take normal precautions appropriate to handle integrated circuits. Every pin withstands 2000 V in the ESD test in accordance with “JEDEC Specification EIA/JESD22-A114A”, HBM model (category 1c), except for pin 1 (XT1) which withstands 500 V, pin 2 (XT2) which withstands 1000 V and pin 8 (VCC(RF)) which withstands 1500 V. Identically, every pin withstands 200 V in the ESD test in accordance with “JEDEC Specification EIA/JESD22-A115A”, MM model (category A). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage −0.3 +6.0 V Vi input voltage pin SDA −0.3 +6.0 V pin SCL −0.3 +6.0 V all other pins −0.3 VCC + 0.3 V Vo output voltage pin SDA −0.3 +6.0 V pin VT −0.3 +35 V all other pins −0.3 VCC + 0.3 V Tamb ambient temperature −20 +85 °C Tstg storage temperature −40 +150 °C Tj junction temperature − 150 °C tsc short-circuit time each pin short-circuited to VCC or GND − 10 s SYMBOL PARAMETER CONDITIONS VALUE UNIT Rth(j-a) thermal resistance from junction to ambient in free air 41.4 K/W |
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