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LM3203 Datasheet(Fiches technique) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Numéro de pièce LM3203
Description  Step-Down DC-DC Converter with Bypass Mode for CDMA / WCDMA RF Power Amplifiers
Télécharger  15 Pages
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Fabricant  NSC [National Semiconductor (TI)]
Site Internet  http://www.national.com
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Electrical Characteristics (Notes 2, 7) Limits in standard typeface are for T
A =TJ = 25˚C. Limits in boldface
type apply over the full operating ambient temperature range (−30˚C
≤ T
A =TJ
≤ +85˚C). Unless otherwise noted,
specifications apply to the LM3203 with: PV
IN =VDD = EN = 3.6V, BYP = 0V, VCON = 0.267V. (Continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Gain
V
CON to VOUT Gain
1
V/V
Z
CON
V
CON Input Resistance
V
CON = 1.2V
1
M
System Characteristics The following spec table entries are guaranteed by design over ambient temperature
range if the component values in the typical application circuit are used. These parameters are not guaranteed by produc-
tion testing.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
T
STARTUP Time for VOUT to rise
to 3.4V in PWM mode
V
IN = 4.2V, COUT = 4.7µF,
R
LOAD =10
L = 3.3uH (I
SAT > 0.94A)
EN = Low to High
50
µs
T
RESPONSE Time for VOUT to Rise
from 0.8V to 3.6V in
PWM Mode
V
IN = 4.2V, COUT = 4.7µF,
R
LOAD =10
L = 3.3uH (I
SAT > 0.94A)
30
µs
C
CON
V
CON Input
Capacitance
V
CON = 1V,
Test frequency = 100kHz
15
pF
T
ON_BYP
Bypass FET Turn On
Time In Bypass Mode
V
IN = 3.6V, VCON = 0.267V,
C
OUT = 4.7µF, RLOAD =10
BYP = Low to High
30
µs
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pins.
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 150˚C (typ.) and disengages at TJ =
130˚C (typ.).
Note 4: The Human body model is a 100pF capacitor discharged through a 1.5k
Ω resistor into each pin. (MIL-STD-883 3015.7) . National Semiconductor
recommends that all integrated circuits be handled with appropriate precautions.
Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
de-rated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125˚C), the maximum power
dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the
following equation: TA-MAX =TJ-MAX-OP –(θJA xPD-MAX).
Note 6: Junction-to-ambient thermal resistance (
θJA) is taken from thermal measurements, performed under the conditions and guidelines set forth in the JEDEC
standard JESD51-2. A 1" x 1", 4 layer, 1.5oz. Cu board was used for the measurements.
Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 8: The LM3203 is designed for mobile phone applications where turn-on after power-up is controlled by the system controller and where requirements for a
small package size overrule increased die size for internal Under Voltage Lock-Out (UVLO) circuitry. Thus, it should be kept in shutdown by holding the EN pin low
until the input voltage exceeds 2.7V.
Note 9: Over-Voltage protection (OVP) threshold is the voltage above the nominal VOUT where the OVP comparator turns off the PFET switch while in PWM mode.
The OVP threshold will be the value of the threshold at the FB voltage times the resistor divider ratio. In the Figure 1, 100mV (typ.) x ((267K + 133K) ÷ 133K).
Note 10: Shutdown current includes leakage current of PFET and Bypass FET.
Note 11: Electrical Characteristic table reflects open loop data (FB=0V and current drawn from SW pin ramped up until cycle by cycle current limit is activated).
Refer to datasheet curves for closed loop data and its variation with regards to supply voltage and temperature. Closed loop current limit is the peak inductor current
measured in the application circuit by increasing output current until output voltage drops by 10%.
Note 12: Bypass FET current limit is defined as the load current at which the FB voltage is 1V lower than VIN.
www.national.com
4




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