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SL6440 Fiches technique(PDF) 4 Page - Zarlink Semiconductor Inc |
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SL6440 Fiches technique(HTML) 4 Page - Zarlink Semiconductor Inc |
4 / 5 page SL6440 Fig.5 Intermodulation v. programming current Fig.6 Supply current v. VCC2 (IP = 0) APPLICATIONS The SL6440 can be used with differential or singleended inputs and outputs. A balanced input will give bettercarrier leak The high input impedanceallowsstepup transformers to be used if desired, whilst high output impedance allows a choice of output impedance and conversion gain. Fig. 2 shows the simplest application circuit. The input and output are single-ended and Ip is supplied from VCC1 via a resistor. Increasing RL will increase the conversion gain, care being taken to choose a suitable value for VCC1. Fig. 8 shows an application with balanced input, for improved carrier leak, and balanced output for increased conversion gain. A lower VCC1 giving lower device dissipation can be used with this arrangement. DESIGN PROCEDURE 1. Decide on input configuration using local oscillator data. If using transformer on input, decide on ratio from noise considerations. 2. Decide on output configuration and value of conversion gain required. 3. Decide on value of lP and VCC2 using intermodulation and compression point graphs. 4. Using values of conversion gain, VCC2, load and Ip already chosen, decide on value of VCC1. 5. Calculate device dissipation and decide whether heatsink is required from maximum operating temperature conslderatlons. Fig.7 Device dissipation v. IP Fig.8 Typical application circuit for highest performance |
Numéro de pièce similaire - SL6440 |
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Description similaire - SL6440 |
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