28
201-0000-032 Rev 3.0, 6/2/99
CHRONTEL
CH5001A
Address:1Dh
Bits:8
Bits 0-2 of the ASE register control the speed of the auto-shutter loop. Values of 0-4 are valid.
Bits 3-4 of the ASE register are reserved, and should be left at their default value.
Bit 5 of the ASE register enables the autoshutter algorithm to adjust the gain of the programmable sample and hold.
A 1 in this location allows the autoshutter algorithm to control this gain. A zero in this location disables the
autoshutter algorithm from controlling this value, and allows bits 2-0 of register PSHG (17H) to control the gain.
Bit 6 of the ASE register enables the autoshutter algorithm to adjust the black level (bias) of the readout signal prior
to A/D conversion. A 1 in this location allows the autoshutter algorithm to control the black level. A 0 in this
location disables the autoshutter algorithm from controlling this value and allows bits 7-0 of register BCLMP (18H)
to control the black level.
Bit 7 of the ASE register enables the autoshutter algorithm to adjust the shutter duration. A 1 in this location allows
the autoshutter algorithm to control the shutter. A zero in this location disables the autoshutter algorithm from
controlling this value and allows registers ESLE, ESLH and ESLL to control the shutter duration.
Auto-Shutter Window / Input Control
Symbol:ASW
Address:1Eh
Bits:7
Bits 0, 1, 2 and 3 of the ASW register determine the active window that is used to operate the autoshutter algorithm.
There are 16 possible windows, which are shown in Figure 11. The default value of these bits can be set using the
PUD [3:0] inputs. This allows the backlight compensation window to be set without using IIC control.
Bit 4 of the ASW register enables the selected window to be highlighted in the image which is output from the
CH5001. All image outside of the window will be reduced in amplitude.
Bits 5 and 6 of the ASW register determine which data is input to the autoshutter algorithm, according to Table 13.
Figure 11: ASW Register Possible Windows
BIT:
7
6
5
4
3
2
1
0
SYMBOL:
ASSE
ASBE
ASGE
Reserved
Reserved
ASSPD2
ASSPD1
ASSPD0
TYPE:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DEFAULT:
1
1
1
0
0
1
0
0
BIT:
7
6
5
4
3
2
1
0
SYMBOL:
ASME
ASCSC
ASWD
ASW3
ASW2
ASW1
ASW0
TYPE:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DEFAULT:
1
0
0
PUD3*
PUD2*
PUD1*
PUD0*
0
1
2
3
4
6
8
5
7
9
13
14
15
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