12
Proprietary to OmniVision Technologies
Version 1.4, March 6, 2003
OV7640/OV7141
CMOS VGA (640 x 480) CAMERACHIP™
Omni ision
14
COMC
04
RW
Common Control C
Bit[7:6]:
Reserved
Bit[5]:
Output Format – Resolution
0:
VGA
(640x480)
1:
QVGA (320x240)
Bit[4]:
Reserved
Bit[3]:
Data Format – HREF Polarity
0:
HREF Positive
1:
HREF Negative
Bit[2:0]:
Reserved
15
COMD
00
RW
Common Control D
Bit[7]:
Data Format – Output Flag Bit Disable
0:
Frame = 254 data bits (00/FF = Reserved flag bits)
1:
Frame = 256 data bits
Bit[6]:
Data Format – Y[7:0]-PCLK Reference Edge
0:
Y[7:0] data out on PCLK falling edge
1:
Y[7:0] data out on PCLK rising edge
Bit[5:1]:
Reserved
Bit[0]:
Data Format – UV Sequence Exchange
0:
V Y U Y V Y U Y
1:
U Y V Y U Y V Y
Note: Bit[0] is not programmable on the B&W OV7141.
16
RSVD
XX
–
Reserved
17
HSTART
1A
RW
Output Format – Horizontal Frame (HREF Column) Start
18
HSTOP
BA
RW
Output Format – Horizontal Frame (HREF Column) Stop
19
VSTRT
03
RW
Output Format – Vertical Frame (Row) Start
1A
VSTOP
F3
RW
Output Format – Vertical Frame (Row) Stop
1B
PSHFT
00
RW
Data Format – Pixel Delay Select
(Delays timing of the Y[7:0] data relative to HREF in pixel units)
• Range: [00] (No delay) to [FF] (256 pixel delay)
1C
MIDH
7F
R
Manufacturer ID Byte – High
(Read only = 0x7F)
1D
MIDL
A2
R
Manufacturer ID Byte – Low
(Read only = 0xA2)
1E
RSVD
XX
–
Reserved
Table 5
SCCB Register List
Address
(Hex)
Register
Name
Default
(Hex)
R/W
Description
POS
NEG