Moteur de recherche de fiches techniques de composants électroniques |
|
X9525 Fiches technique(PDF) 14 Page - Intersil Corporation |
|
X9525 Fiches technique(HTML) 14 Page - Intersil Corporation |
14 / 26 page 14 FN8210.0 March 10, 2005 For example, a sequence of writes to the device CON- STAT register consisting of [02H, 06H, 02H] will reset the BL0 and BL0 bits in the CONSTAT Register to “0”. It should be noted that a write to any nonvolatile bit of CONSTAT register will be ignored if the Write Protect pin of the X9525 is active (HIGH) (See "WP: Write Protection Pin"). CONSTAT Register Read Operation The contents of the CONSTAT Register can be read at any time by performing a random read (See Figure 19). Using the Slave Address Byte set to 1010A0101, and an Address Byte of FFh. Only one byte is read by each reg- ister read operation. The X9525 resets itself after the first byte is read. The master should supply a STOP condition to be consistent with the bus protocol. After setting the WEL and / or the RWEL bit(s) to a “1”, a CONSTAT register read operation may occur, without interrupting a proceeding CONSTAT register write oper- ation. When reading the contents of the CONSTAT register, the bits CS7-CS5 and CS0 will always return “0”. DATA PROTECTION There are a number of levels of data protection features designed into the X9525. Any write to the device first requires setting of the WEL bit in the CONSTAT register. A write to the CONSTAT register itself, further requires the setting of the RWEL bit. Block Lock protection of the device enables the user to inhibit writes to certain regions of the EEPROM memory, as well as to all the DCPs. One further level of data protection in the X9525, is incorpo- rated in the form of the Write Protection pin. WP: Write Protection Pin When the Write Protection (WP) pin is active (HIGH), it disables nonvolatile write operations to the X9525. The table below (X9525 Write Permission Status) sum- marizes the effect of the WP pin (and Block Lock), on the write permission status of the device. Additional Data Protection Features In addition to the preceding features, the X9525 also incorporates the following data protection functionality: —The proper clock count and data bit sequence is required prior to the STOP bit in order to start a nonvol- atile write cycle. X9525 Write Permission Status Figure 19. CONSTAT Register Read Command Sequence 0 Slave Address Address Byte A C K A C K S t a r t S t o p Slave Address Data A C K 1 S t a r t SDA Bus Signals from the Slave Signals from the Master 0 1 0 0 1 0 1 1 0 1 0 0 0 0 READ Operation WRITE Operation “Dummy” Write A 0 1 1 1 1 1 1 1 1 A 0 Block Lock Bits WP DCP Volatile Write Permitted DCP Nonvolatile Write Permitted Write to EEPROM Permitted Write to CONSTAT Register Permitted BL0 BL1 Volatile Bits Nonvolatile Bits x1 1 NO NO NO YES NO 1x 1 NO NO NO YES NO 0 0 1 YES NO NO YES NO x 1 0 NO NO Not in locked region YES YES 1x 0 NO NO Not in locked region YES YES 00 0 YES YES Yes (All Array) YES YES X9525 |
Numéro de pièce similaire - X9525 |
|
Description similaire - X9525 |
|
|
Lien URL |
Politique de confidentialité |
ALLDATASHEET.FR |
ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |