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CAT310J Fiches technique(PDF) 3 Page - Catalyst Semiconductor |
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CAT310J Fiches technique(HTML) 3 Page - Catalyst Semiconductor |
3 / 10 page CAT310 © 2005 Catalyst Semiconductor, Inc. 3 Doc No. 25087, Rev. 00 Characteristics subject to change without notice ELECTRICAL OPERATING CHARACTERISTICS Switching Characteristics VCC = 5.0V, -40ºC ≤ TA ≤ 125 ºC, over recommended operating conditions unless specified otherwise. Symbol Name Conditions Min Typ Max Units SCLK fSCLK SCLK Clock Frequency 10 MHz twh/wl SCLK Pulse width High or Low 30 ns SIN tsu Setup time SIN to SCLK 10 ns th Hold time SIN to SCLK 10 ns XLAT tw XLAT Pulse width SIN to SCLK 20 ns th Hold time SCLK to XLAT 20 ns tr SOUT rise time (10% to 90%) CL = 15pF 20 ns tf SOUT fall time (90% to 10%) CL = 15pF 15 ns tpd Propagation delay time Blank ↑ to OUT(n) 25 ns tpd Propagation delay time Blank ↓ to OUT(n) 25 ns tpd Propagation delay time SCLK to SOUT 25 ns All logic inputs contain Schmitt trigger inputs. BLOCK DIAGRAM |
Numéro de pièce similaire - CAT310J |
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Description similaire - CAT310J |
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