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PRINCIPLES OF OPERATION

SERIAL INTERFACE

SCLK

SOUT

SIN

MODE

Vcc

DC n

MSB

GS

MSB

X

1

1

XLAT

DC n

LSB

96

192

GS

LSB

193

DC n+1

MSB

DC n+1

MSB−1

1

DC n

MSB

DC n

LSB

DC

MSB

GS

MSB

SID

MSB

X

2

DC Mode Data

Input Cycle

GS Mode Data

Input Cycle

DC Mode Data

Input Cycle

X

ERROR INFORMATION OUTPUT

TLC5941

SLVS589 – JULY 2005

The TLC5941 includes a flexible serial interface, which can be connected to microcontrollers or digital signal

processors in various ways. Only 3 pins are needed to input data into the device. The rising edge of SCLK signal

shifts the data from the SIN pin to the internal register. After all data is clocked in, a rising edge of XLAT latches

the serial data to the internal registers. All data are clocked in with the MSB first. Multiple TLC5941 devices can

be cascaded by connecting the SOUT pin of one device with the SIN pin of the following device. The SOUT pin

can also be connected to the controller to receive status information from the TLC5941. The serial data format is

96-bit or 192-bit wide, depending on programming mode of the device.

Figure 6. Serial Data Input Timing Chart

The open-drain output XERR is used to report both of the TLC5941 error flags, TEF and LOD. During normal

operating conditions, the internal transistor connected to the XERR pin is turned off. The voltage on XERR is

on, and XERR is pulled to GND. Because XERR is an open-drain output, multiple ICs can be ORed together and

(see Figure 13).

To differentiate LOD and TEF signal from XERR pin, LOD can be masked out with BLANK = HIGH.

Table 1. XERR Truth Table

ERROR CONDITION

ERROR INFORMATION

SIGNALS

TEMPERATURE

OUTn VOLTAGE

TEF

LOD

BLANK

XERR

Don't Care

L

X

H

H

Don't Care

H

X

L

L

L

H

L

H

L

L

H

L

L

H

H

L

11