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TPS3824-25QDBVRQ1 Fiches technique(PDF) 2 Page - Texas Instruments

No de pièce TPS3824-25QDBVRQ1
Description  PROCESSOR SUPERVISORY CIRCUITS
Download  13 Pages
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

TPS3824-25QDBVRQ1 Fiches technique(HTML) 2 Page - Texas Instruments

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TPS3820-xx-Q1, TPS3823-xx-Q1, TPS3824-xx-Q1, TPS3825-xx-Q1, TPS3828-xx-Q1
PROCESSOR SUPERVISORY CIRCUITS
SGLS143A – DECEMBER 2002 – REVISED JANUARY 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
During power-on, RESET is asserted when supply voltage VDD becomes higher than 1.1 V. Thereafter, the
supply voltage supervisor monitors VDD and keeps RESET active as long as VDD remains below the threshold
voltage VIT–. An internal timer delays the return of the output to the inactive state (high) to ensure proper system
reset. The delay time, td, starts after VDD has risen above the threshold voltage VIT–. When the supply voltage
drops below the threshold voltage VIT–, the output becomes active (low) again. No external components are
required. All the devices of this family have a fixed-sense threshold voltage VIT– set by an internal voltage
divider.
The TPS3820/3/5/8 devices incorporate a manual reset input, MR. A low level at MR causes RESET to become
active. The TPS3824/5 devices include a high-level output RESET. TPS3820/3/4/8 have a watchdog timer that
is periodically triggered by a positive or negative transition at WDI. When the supervising system fails to retrigger
the watchdog circuit within the time-out interval, ttout, RESET becomes active for the time period td. This event
also reinitializes the watchdog timer. Leaving WDI unconnected disables the watchdog.
In applications where the input to the WDI pin may be active (transitioning high and low) when the
TPS3820/3/4/8 is asserting RESET, the TPS3820/3/4/8 does not return to a non-reset state when the input
voltage is above Vt. If the application requires that input to WDI is active when RESET is asserted, WDI must
be decoupled from the active signal. This can be accomplished by using an N-channel FET in series with the
WDI pin, with the gate of the FET connected to the RESET output as shown in Figure 1.
WDI
RESET
TPS3824
WDI External
Figure 1
The product spectrum is designed for supply voltages of 2.5 V, 3 V, 3.3 V, and 5 V. The circuits are available
in a 5-pin SOT23-5 package. The TPS382x-xxQ-Q1 devices are characterized for operation over a temperature
range of –40
°C to 125°C, and are qualified in accordance with AEC-Q100 stress test qualification for integrated
circuits.


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