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TPD4E001 Fiches technique(PDF) 4 Page - Texas Instruments

No de pièce TPD4E001
Description  TPD4E001 Low-Capacitance 4-Channel ESD-Protection for High-Speed Data Interfaces
Download  30 Pages
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

TPD4E001 Fiches technique(HTML) 4 Page - Texas Instruments

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1
2
3
6
5
4
IO1
VCC
IO2
IO3
GND
IO4
IO3
GND
V
CC
IO4
1
2
6
3
5
4
IO1
IO2
IO1
IO2
GND
V
CC
IO4
IO3
1
2
3
4
5
6
IO3
IO2
V
CC
IO4
1
2
6
3
5
4
IO1
GND
IO1
IO2
GND
V
CC
IO4
IO3
GND
1
2
3
4
5
6
IO3
GND
V
CC
IO4
1
2
6
3
5
4
IO2
IO1
4
TPD4E001
SLLS682O – JULY 2006 – REVISED JULY 2019
www.ti.com
Product Folder Links: TPD4E001
Submit Documentation Feedback
Copyright © 2006–2019, Texas Instruments Incorporated
5 Pin Configuration and Functions
DRL Package
6-Pin SOT
Top View
DCK2 Package
6-Pin SC70
Top View
DBV or DCK Package
6-Pin SOT or SC70
Top View
DRS Package
6-Pin SON
Top View
DPK Package
6-Pin USON
Top View
TPD4E001R DBV Package
6-Pin SOT
Top View
Pin Functions
PIN
I/O
DESCRIPTION
NAME
DRS, DRL, DPK
DBV, DCK
TPD4E001R
GND
3
2
5
—
Ground
IOx
1
1
1
I
ESD-protected channel
2
3
3
4
4
4
5
6
6
VCC
6
5
2
I
Power-supply input. Bypass VCC to GND with a 0.1-μF
ceramic capacitor
Exposed thermal
pad (DRS package only)
—
Exposed thermal pad. Connect to GND or leave floating


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