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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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TLV320ADC6140 Fiches technique(PDF) 17 Page - Texas Instruments |
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TLV320ADC6140 Fiches technique(HTML) 17 Page - Texas Instruments |
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17 / 122 page  17 TLV320ADC6140 www.ti.com SBAS992 – JULY 2019 Product Folder Links: TLV320ADC6140 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated 8 Detailed Description 8.1 Overview The TLV320ADC6140 is a high-performance, low-power, flexible, quad-channel, audio analog-to-digital converter (ADC) with extensive feature integration. This device is intended for applications in voice-activated systems, professional microphones, audio conferencing, portable computing, communication, and entertainment applications. The high dynamic range of the device enables far-field audio recording with high fidelity. This device integrates a host of features that reduces cost, board space, and power consumption in space-constrained, battery-powered, consumer, home, and industrial applications. The TLV320ADC6140 consists of the following blocks: • Quad-channel, multibit, high-performance delta-sigma (ΔΣ) ADC • Configurable single-ended or differential audio inputs • Low-noise, programmable microphone bias output • Dynamic range enhancer (DRE) to support 120-dB dynamic range • Automatic gain controller (AGC) • Programmable decimation filters with linear-phase or low-latency filter • Programmable channel gain, volume control, biquad filters for each channel • Programmable phase and gain calibration with fine resolution for each channel • Programmable high-pass filter (HPF), and digital channel mixer • Pulse density modulation (PDM) digital microphone interface with high-performance decimation filter • Integrated low-jitter phase-locked loop (PLL) supporting a wide range of system clocks • Integrated digital and analog voltage regulators to support single-supply operation Communication to the TLV320ADC6140 to configure the control registers is supported using an I2C or SPI interface. The device supports a highly flexible audio serial interface [time-division multiplexing (TDM), I2S, or left-justified (LJ)] to transmit audio data seamlessly in the system across devices. The device can support multiple devices by sharing the common I2C and TDM buses across devices. Moreover, the device includes a daisy-chain feature and a secondary audio serial output data pin. These features relax the shared TDM bus timing requirements and board design complexities when operating multiple devices for applications requiring high audio data bandwidth. Table 1 lists the reference abbreviations used throughout this document to registers that control the device. Table 1. Abbreviations for Register References REFERENCE ABBREVIATION DESCRIPTION EXAMPLE Page y, register z, bit k Py_Rz_Dk Single data bit. The value of a single bit in a register. Page 4, register 36, bit 0 = P4_R36_D0 Page y, register z, bits k-m Py_Rz_D[k:m] Range of data bits. A range of data bits (inclusive). Page 4, register 36, bits 3-0 = P4_R36_D[3:0] Page y, register z Py_Rz One entire register. All eight bits in the register as a unit. Page 4, register 36 = P4_R36 Page y, registers z-n Py_Rz-Rn Range of registers. A range of registers in the same page. Page 4, registers 36, 37, 38 = P4_R36-R38 |
Numéro de pièce similaire - TLV320ADC6140 |
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Description similaire - TLV320ADC6140 |
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