Moteur de recherche de fiches techniques de composants électroniques |
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ADV7330 Fiches technique(PDF) 8 Page - Analog Devices |
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ADV7330 Fiches technique(HTML) 8 Page - Analog Devices |
8 / 76 page REV. B –8– ADV7330 CLKIN Y7–Y0 *Y0, Cb, SEQUENCE AS PER SUBADDRESS 01h BIT 1 t9 = CLOCK HIGH TIME t10 = CLOCK LOW TIME t11 = DATA SETUP TIME t12 = DATA HOLD TIME t11 t12 t13 t14 t11 t12 t9 t10 3FF 00 XY Cb0* Y0 Cr0 Y1 00 HSYNC_O/P VSYNC_O/P BLANK_O/P CONTROL OUTPUTS Figure 3. PS 4:2:2 1 × 8-Bit Interleaved at 27 MHz EAV/SAV Input Mode (Input Mode 100) CLKIN Y7–Y0 t9 = CLOCK HIGH TIME t10 = CLOCK LOW TIME t11 = DATA SETUP TIME t12 = DATA HOLD TIME t9 t10 t11 t12 t13 t14 Cb0 Y0 Cr2 Y1 Cbxxx Cbxxx HSYNC_I/P VSYNC_I/P BLANK_I/P CONTROL INPUTS HSYNC_O/P VSYNC_O/P BLANK_O/P CONTROL OUTPUTS Figure 4. PS 4:2:2 1 × 8-Bit Interleaved at 54 MHz Hsync/Vsync I/P Mode (Input Mode 011) CLKIN Y7–Y0 CONTROL OUTPUTS t9 = CLOCK HIGH TIME t10 = CLOCK LOW TIME t11 = DATA SETUP TIME t12 = DATA HOLD TIME 3FF 00 00 XY Cb0 Y0 Cr0 Y1 t11 t12 t13 t14 t9 t10 Figure 5. PS 4:2:2 1 × 8-Bit Interleaved at 54 MHz EAV/SAV Input Mode (Input Mode 011) |
Numéro de pièce similaire - ADV7330 |
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Description similaire - ADV7330 |
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