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EL2141 Fiches technique(PDF) 4 Page - Intersil Corporation |
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EL2141 Fiches technique(HTML) 4 Page - Intersil Corporation |
4 / 6 page 4 FN7048.1 February 11, 2005 Applications Information Choice of Feedback Resistor There is little to be gained from choosing resistor R2 values below 400 Ω and, in fact, it would only result in increased power dissipation and signal distortion. Above 400 Ω, the bandwidth response will develop some peaking (for a gain of two), but substantially higher resistor R2 values may be used for higher voltage gains, such as up to 2k Ω at a gain of eight before peaking will develop. R1 and R3 are selected as needed to set the voltage gain, and while R1 = R3 is sug- gested, the gain equation above holds for any values (see distortion for further suggestions). Capacitance Considerations As with many high bandwidth amplifiers, the EL2141 prefers not to drive highly capacitive loads. It is best if the capaci- tance on VOUT and VOUTB is kept below 10pF if the user does not want gain peaking to develop. In addition, on the EL2141, the two feedback nodes FBP and FBN should be laid out so as to minimize stray capacitance, else an additional pole will potentially develop in the response with possible gain peaking. The amount of capacitance tolerated on any of these nodes in an actual application will also be dependent on the gain setting and the resistor values in the feedback network. Distortion Considerations The harmonics that these amplifiers will potentially produce are the 2nd, 3rd, 5th, and 6th. Their amplitude is application dependent. All other harmonics should be negligible by com- parison. Each should be considered separately: H2 The second harmonic arises from the input stage, and the lower the applied differential signal amplitude, the lower the magnitude of the second harmonic. For practical consid- erations of required output signal and input noise levels, the user will end up choosing a circuit gain. Referring to Figure 1, it is best if the voltage at the negative feedback node tracks the VREF node, and the voltage at the positive feedback node tracks the VIN node respectively. This would theoreti- cally require that R1 + R2 = R3, although the lowest distortion is found at about R3 = R1 + (0.7*R2). With this arrangement, the second harmonic should be suppressed well below the value of the third harmonic. H3 The third harmonic should be the dominant harmonic and is primarily affected by output load current which, of course, is unavoidable. However, this should encourage the user not to waste current in the gain setting resistors, and to use val- ues that consume only a small proportion of the load current, so long as peaking does not occur. The more load current, the worse the distortion, but depending on the frequency, it may be possible to reduce the amplifier gain so that there is more internal gain left to cancel out any distortion. H5 The fifth harmonic should always be below the third, and will not become significant until heavy load currents are drawn. Generally, it should respond to the same efforts applied to reducing the third harmonic. H6 The sixth harmonic should not be a problem and is the result of poor power supply decoupling. While 100nF chip capacitors may be sufficient for some applications, it would be insufficient for driving full signal swings into a twisted pair line at 100kHz. Under these conditions, the addition of 4.7 µF tantalum capacitors would cure the problem. FIGURE 5. DISTORTION vs FREQUENCY (GAIN = 6, RLOAD = 200Ω) VIN = 2VPK-PK FIGURE 6. OUTPUT SIGNAL AND COMMON MODE SIGNAL vs FREQUENCY Typical Performance Curves (Continued) GAIN R1 R2 R3 ++ R2 ------------------------------------- = EL2141 |
Numéro de pièce similaire - EL2141 |
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Description similaire - EL2141 |
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