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ADM2486BRW-REEL Fiches technique(PDF) 9 Page - Analog Devices |
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ADM2486BRW-REEL Fiches technique(HTML) 9 Page - Analog Devices |
9 / 20 page ADM2486 Rev. C | Page 9 of 20 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ADM2486 TOP VIEW (Not to Scale) VDD1 1 GND11 2 RxD 3 RE 4 VDD2 GND21 NC B 16 15 14 13 5 6 4 12 11 5 7 8 10 9 RTS TxD PV GND11 A NC DE GND21 NC = NO CONNECT 1 PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED. EITHER OR BOTH MAY BE USED FOR GND1. PIN 9 AND PIN 15 ARE INTERNALLY CONNECTED. EITHER OR BOTH MAY BE USED FOR GND2. Figure 2. Pin Configuration Table 8. Pin No. Mnemonic Function 1 VDD1 Power Supply (Logic Side). 2, 8 GND1 Ground (Logic Side). 3 R×D Receiver Output Data. This output is high when (A – B) > 200 mV, and low when (A – B) < –200 mV. The output is three-stated when the receiver is disabled, that is, when RE is driven high. 4 RE Receiver Enable Input. This is an active-low input. Driving this input low enables the receiver, and driving it high disables the receiver. 5 RTS Request to Send Input. Driving this input high enables the driver, and driving it low disables the driver. 6 TxD Transmit Data Input. Data to be transmitted by the driver is applied to this input. 7 PV Power_Valid. Used during power-up and power-down. See the Applications Information section. 9, 15 GND2 Ground (Bus Side). 10 DE Driver Enable Status Output. This output signals the driver enable or disable status to other devices on the bus. DE is high when the driver is enabled and low when the driver is disabled. 11, 14 NC No Connect. 12 A Noninverting Driver Output/Receiver Input. When the driver is disabled, or when VDD1 or VDD2 is powered down, Pin A is put into a high impedance state to avoid overloading the bus. 13 B Inverting Driver Output/Receiver Input. When the driver is disabled, or when VDD1 or VDD2 is powered down, Pin B is put into a high impedance state to avoid overloading the bus. 16 VDD2 Power Supply (Bus Side). |
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