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NUC100-RE2C Datasheet(Fiches technique) 51 Page - Nuvoton Technology Corporation

Numéro de pièce NUC100-RE2C
Description  ARM® Cortex®-M 32-bit Microcontroller
Télécharger  107 Pages
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Fabricant  NUVOTON [Nuvoton Technology Corporation]
Site Internet  http://www.nuvoton.com
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NUC100/120xxxDN
Aug 31, 2015
Page 51 of 107
Rev 1.01
6.2.3
Power Modes and Wake-up Sources
There are several wake-up sources in Idle mode and Power-down mode. Table 6-2 lists the
available clocks for each power mode.
Power Mode
Normal Mode
Idle Mode
Power-down Mode
Definition
CPU is in active state
CPU is in sleep state
CPU is in sleep state
and all clocks stop
except LXT and LIRC.
SRAM content
retended.
Entry Condition
Chip is in normal
mode after system
reset released
CPU executes WFI
instruction.
CPU sets sleep mode
enable and power
down enable and
executes WFI
instruction.
Wake-up Sources
N/A
All interrupts
RTC, WDT, I²C,
Timer, UART, BOD,
USB and GPIO
Available Clocks
All
All except CPU clock
LXT and LIRC
After Wake-up
N/A
CPU back to normal
mode
CPU back to normal
mode
Table 6-2 Power Mode Difference Table
Normal Mode
CPU Clock ON
HXT, LXT, HIRC, LIRC, HCLK, PCLK ON
Flash ON
Power-down Mode
CPU Clock OFF
HXT,HIRC, HCLK, PCLK OFF
Flash Halt
System reset released
CPU executes WFI
Interrupts occur
Idle Mode
CPU Clock OFF
HXT, LXT, HIRC, LIRC, HCLK, PCLK ON
Flash Halt
1. SLEEPDEEP(SCR[2]) = 1
2. PWR_DOWN_EN (PWRCON[7]) = 1
PD_WAIT_CPU (PWRCON[8]) = 1
3. CPU executes WFI
Wake-up events
occur
LXT, LIRC ON
Figure 6-7 Power Mode State Machine
1. LXT (32 kHz XTL) ON or OFF depends on S/W setting in run mode.
2. LIRC (10 kHz OSC) ON or OFF depends on S/W setting in run mode.




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