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NUC140-RB3C Fiches technique(PDF) 10 Page - Nuvoton Technology Corporation

No de pièce NUC140-RB3C
Description  ARM Cortex??M0 32-BIT MICROCONTROLLER
Download  89 Pages
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Fabricant  NUVOTON [Nuvoton Technology Corporation]
Site Internet  http://www.nuvoton.com
Logo NUVOTON - Nuvoton Technology Corporation

NUC140-RB3C Fiches technique(HTML) 10 Page - Nuvoton Technology Corporation

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NuMicro
™ NUC120 Data Sheet
Publication Release Date: Jan. 2, 2012
- 10 -
Revision V2.03
Full duplex synchronous serial data transfer
Variable length of transfer data from 1 to 32 bits
MSB or LSB first data transfer
Rx and Tx on both rising or falling edge of serial clock independently
2 slave/device select lines when it is as the master, and 1 slave/device select line
when it is as the slave
Support byte suspend mode in 32-bit transmission
Support PDMA mode
• I2C
Up to two sets of I
2C device
Master/Slave mode
Bidirectional data transfer between masters and slaves
Multi-master bus (no central master)
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer
Programmable clocks allow versatile rate control
Support multiple address recognition (four slave address with mask option)
• I2S
Interface with external audio CODEC
Operate as either master or slave mode
Capable of handling 8-, 16-, 24- and 32-bit word sizes
Mono and stereo audio data supported
I
2S and MSB justified data format supported
Two 8 word FIFO data buffers are provided, one for transmit and one for receive
Generates interrupt requests when buffer levels cross a programmable boundary
Support two DMA requests, one for transmit and one for receive
• PS/2 Device Controller
Host communication inhibit and request to send detection
Reception frame error detection
Programmable 1 to 16 bytes transmit buffer to reduce CPU intervention
Double buffer for data reception
S/W override bus
• USB 2.0 Full-Speed Device
One set of USB 2.0 FS Device 12Mbps
On-chip USB Transceiver
Provide 1 interrupt source with 4 interrupt events
Support Control, Bulk In/Out, Interrupt and Isochronous transfers
Auto suspend function when no bus signaling for 3 ms
Provide 6 programmable endpoints
Include 512 Bytes internal SRAM as USB buffer
Provide remote wake-up capability
• EBI (External bus interface) support (NuMicro™ NUC100/NUC120 Low Density 64-pin
Package Only)
Accessible space: 64KB in 8-bit mode or 128KB in 16-bit mode
Support 8-/16-bit data width
Support byte write in 16-bit data width mode


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