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NUC130-VC2C Datasheet(Fiches technique) 43 Page - Nuvoton Technology Corporation

Numéro de pièce NUC130-VC2C
Description  ARM Cortex™-M0 32-BIT MICROCONTROLLER
Télécharger  89 Pages
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Fabricant  NUVOTON [Nuvoton Technology Corporation]
Site Internet  http://www.nuvoton.com
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 43 page
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NuMicro
™ NUC120 Data Sheet
Publication Release Date: Jan. 2, 2012
- 43 -
Revision V2.03
the PWM counter 0/1/2/3 will be reload at this moment.
ture is confined by the capture interrupt
ll do at least three steps, they are: Read
pt source and Read CRLRx/CFLRx(x=0~3) to get capture value and finally write
zero. If interrupt latency will take time T0 to finish, the capture signal mustn’t
5.7.
5.7.
5.7.
port 8 Capture input channels shared with 8 PWM output channels (NuMicro
The maximum captured frequency that PWM can cap
latency. When capture interrupt occurred, software wi
PIIR to get interru
1 to clear PIIR to
transition during this interval (T0). In this case, the maximum capture frequency will be 1/T0. For
example:
HCLK = 50 MHz, PWM_CLK = 25 MHz, Interrupt latency is 900 ns
So the maximum capture frequency will is 1/900ns ≈ 1000 kHz
2
Features
2.1
PWM function features:
PWM group has two PWM generators. Each PWM generator supports one 8-bit
prescaler, one clock divider, two PWM-timers (down counter), one dead-zone
generator and two PWM outputs.
Up to 16-bit resolution
PWM Interrupt request synchronized with PWM period
One-shot or Auto-reload mode PWM
Up to 2 PWM group (PWMA/PWMB) to support 8 PWM channels or 4 PWM paired
channels (only 1 PWM group support for NuMicro
™ NUC100/NUC120 Low Density)
2.2
Capture Function Features:
Timing control logic shared with PWM Generators
Sup
NUC100/NUC120 Low Density only support 4 Capture input channels shared with 4
PWM output channels)
Each channel supports one rising latch register (CRLR), one falling latch register
(CFLR) and Capture interrupt flag (CAPIFx)




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