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NUC120-YB2C Fiches technique(PDF) 40 Page - Nuvoton Technology Corporation

No de pièce NUC120-YB2C
Description  ARM Cortex??M0 32-BIT MICROCONTROLLER
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NUC120-YB2C Fiches technique(HTML) 40 Page - Nuvoton Technology Corporation

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NuMicro
™ NUC120 Data Sheet
Publication Release Date: Jan. 2, 2012
- 40 -
Revision V2.03
(Master/Slave) (I
2C)
aster and a Slave synchronously to SCL on the SDA line on a
CL. A transition on the SDA
5.6
I
2C Serial Interface Controller
5.6.1
Overview
I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data
exchange between devices. The I2C standard is a true multi-master bus including collision
detection and arbitration that prevents data corruption if two or more masters attempt to control
the bus simultaneously.
Data is transferred between a M
byte-by-byte basis. Each data byte is 8-bit long. There is one SCL clock pulse for each data bit
with the MSB being transmitted first. An acknowledge bit follows each transferred byte. Each bit is
sampled during the high period of SCL; therefore, the SDA line may be changed only during the
low period of SCL and must be held stable during the high period of S
line while SCL is high is interpreted as a command (START or STOP). Please refer to the Figure
5-9 for more detail I2C BUS Timing.
Figure 5-9 I2C Bus Timing
ce that meets the I2C bus standard mode
omously. To enable this port, the bit ENS1
in I2CON should be set to '1'. The I2C H/W interfaces to the I2C bus via two pins: SDA and SCL.
Pull up resistor is needed for I2C operation as these are open drain pins. When the I/O pins are
used as I2C port, user must set the pins function to I2C in advance.
The device’s on-chip I2C logic provides the serial interfa
specification. The I2C port handles byte transfers auton


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