Moteur de recherche de fiches techniques de composants électroniques |
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NUC120-YD3E Fiches technique(PDF) 70 Page - Nuvoton Technology Corporation |
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NUC120-YD3E Fiches technique(HTML) 70 Page - Nuvoton Technology Corporation |
70 / 107 page NUC100/120xxxDN Aug 31, 2015 Page 70 of 107 Rev 1.01 Timer Controller (TMR) 6.8 6.8.1 Overview The timer controller includes four 32-bit timers, TIMER0~TIMER3, allowing user to easily implement a timer control for applications. The timer can perform functions, such as frequency measurement, event counting, interval measurement, clock generation, and delay timing. The timer can generate an interrupt signal upon time-out, or provide the current value during operation. 6.8.2 Features Four sets of 32-bit timers with 24-bit up counter and one 8-bit prescale counter Independent clock source for each timer Provides one-shot, periodic, toggle and continuous counting operation modes Time-out period = (Period of timer clock input) * (8-bit prescale counter + 1) * (24-bit TCMP) Maximum counting cycle time = (1 / T MHz) * (2 8) * (224), T is the period of timer clock 24-bit up counter value is readable through TDR (Timer Data Register) Supports event counting function to count the event from external pin Supports external pin capture function for interval measurement Supports external pin capture function for reset timer counter Supports chip wake-up from Idle/Power-down mode if a timer interrupt signal is generated (TIF set to 1) |
Numéro de pièce similaire - NUC120-YD3E |
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Description similaire - NUC120-YD3E |
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