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NUC220-YA2E Datasheet(Fiches technique) 64 Page - Nuvoton Technology Corporation

Numéro de pièce NUC220-YA2E
Description  ARM® Cortex®-M 32-bit Microcontroller
Télécharger  107 Pages
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Fabricant  NUVOTON [Nuvoton Technology Corporation]
Site Internet  http://www.nuvoton.com
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 64 page
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NUC100/120xxxDN
Aug 31, 2015
Page 64 of 107
Rev 1.01
6.3.4
Peripherals Clock
The peripherals clock can be selected as different clock source depends on the clock source
select control registers (CLKSEL1, CLKSEL2 and CLKSEL3).
6.3.5
Power-down Mode Clock
When chip enters Power-down mode, system clocks, some clock sources, and some peripheral
clocks will be disabled. Some clock sources and peripherals clocks are still active in Power-down
mode.
The clocks still kept active are listed below:
Clock Generator
Internal 10 kHz low speed oscillator clock
External 32.768 kHz low speed crystal clock
Peripherals Clock (when IP adopt external 32.768 kHz low speed crystal oscillator or
10 kHz low speed oscillator as clock source)
6.3.6
Frequency Divider Output
This device is equipped with a power-of-2 frequency divider which is composed by16 chained
divide-by-2 shift registers. One of the 16 shift register outputs selected by a sixteen to one
multiplexer is reflected to CLKO function pin. Therefore there are 16 options of power-of-2 divided
clocks with the frequency from Fin/2
1 to F
in/2
16 where Fin is input clock frequency to the clock
divider.
The output formula is Fout = Fin/2
(N+1), where F
in is the input clock frequency, Fout is the clock
divider output frequency and N is the 4-bit value in FSEL (FRQDIV[3:0]).
When writing 1 to DIVIDER_EN (FRQDIV[4]), the chained counter starts to count. When writing 0
to DIVIDER_EN (FRQDIV[4]), the chained counter continuously runs till divided clock reaches low
state and stay in low state.
11
10
01
00
HCLK
32.768 kHz
4~24 MHz
22.1184 MHz
FRQDIV_S (CLKSEL2[3:2])
FDIV_EN(APBCLK[6])
FRQDIV_CLK
Note: Before clock switching, both the pre-selected and newly
selected clock sources must be turned on and stable.
Figure 6-14 Clock Source of Frequency Divider




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