Moteur de recherche de fiches techniques de composants électroniques |
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NUC100-YC1E Fiches technique(PDF) 85 Page - Nuvoton Technology Corporation |
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NUC100-YC1E Fiches technique(HTML) 85 Page - Nuvoton Technology Corporation |
85 / 107 page NUC100/120xxxDN Aug 31, 2015 Page 85 of 107 Rev 1.01 I 2S Controller (I2S) 6.19 6.19.1 Overview The I 2S controller consists of I 2S protocol to interface with external audio CODEC. Two 8-word deep FIFO for read path and write path respectively and is capable of handling 8-, 16-, 24- and 32-bit word sizes. PDMA controller handles the data movement between FIFO and memory. 6.19.2 Features Operated as either Master or Slave Capable of handling 8-, 16-, 24- and 32-bit word sizes Supports Mono and stereo audio data Supports I 2S and MSB justified data format Provides two 8-word FIFO data buffers, one for transmitting and the other for receiving Generates interrupt requests when buffer levels cross a programmable boundary Two PDMA requests, one for transmitting and the other for receiving |
Numéro de pièce similaire - NUC100-YC1E |
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Description similaire - NUC100-YC1E |
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