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NUC120-LA1E Fiches technique(PDF) 84 Page - Nuvoton Technology Corporation

No de pièce NUC120-LA1E
Description  ARM짰 Cortex짰-M 32-bit Microcontroller
Download  107 Pages
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Fabricant  NUVOTON [Nuvoton Technology Corporation]
Site Internet  http://www.nuvoton.com
Logo NUVOTON - Nuvoton Technology Corporation

NUC120-LA1E Fiches technique(HTML) 84 Page - Nuvoton Technology Corporation

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NUC100/120xxxDN
Aug 31, 2015
Page 84 of 107
Rev 1.01
Serial Peripheral Interface (SPI)
6.18
6.18.1
Overview
The Serial Peripheral Interface (SPI) is a synchronous serial data communication protocol that
operates in full duplex mode. Devices communicate in Master/Slave mode with the 4-wire bi-
direction interface. The NuMicro
®
NUC100 series contains up to four sets of SPI controllers
performing a serial-to-parallel conversion on data received from a peripheral device, and a
parallel-to-serial conversion on data transmitted to a peripheral device. Each set of SPI controller
can be configured as a master or a slave device.
The SPI controller supports the variable serial clock function for special applications and 2-bit
Transfer mode to connect 2 off-chip slave devices at the same time. This controller also supports
the PDMA function to access the data buffer and also supports Dual I/O Transfer mode.
6.18.2
Features
Up to four sets of SPI controllers
Supports Master or Slave mode operation
Supports 2-bit Transfer mode
Supports Dual I/O Transfer mode
Configurable bit length of a transfer word from 8 to 32-bit
Provides separate 8-layer depth transmit and receive FIFO buffers
Supports MSB first or LSB first transfer sequence
Two slave select lines in Master mode
Supports the byte reorder function
Supports Byte or Word Suspend mode
Variable output serial clock frequency in Master mode
Supports PDMA transfer
Supports 3-wire, no slave select signal, bi-direction interface


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