74HC4060 datasheet(6/7 Pages) SS

No de pièce	74HC4060

Description	High Speed CMOS Logic

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AC Electrical Characteristics continued6

High Speed CMOS Logic – 74HC4060

Rev 1.0

26/11/17

8. Used to determine the no-load dynamic power consumption: PD = CPD VCC

2f + ICC VCC

LIMITS

PARAMETER

SYMBOL

VCC

CONDITIONS

25°C

85°C

FULL RANGE

5

UNITS

2.0V

75

95

3.0V

60

75

4.5V

15

19

Maximum Propagation

Delay, Qn to Qn+1

(Figure 3,4)

tPLH, tPHL

6.0V

CL = 50pF,

tr = tf = 6ns

13

16

ns

2.0V

75

95

3.0V

27

32

4.5V

15

19

Maximum Output

Transition Time,

any output

(Figure 1,4)

tTLH, tTHL

6.0V

CL = 50pF,

tr = tf = 6ns

13

16

ns

Maximum Input

Capacitance

CIN

-

10

pF

TYPICAL

Power Dissipation

Capacitance

8

CPD

-

TA = 25°C,

VCC = 5.0V

35

pF

Timing Requirements6

LIMITS

PARAMETER

SYMBOL

VCC

CONDITIONS

25°C

85°C

FULL RANGE

5

UNITS

2.0V

100

125

3.0V

75

100

4.5V

20

25

Minimum Recovery

Time, Reset Inactive to

Clock

(Figure 2)

trec

6.0V

tr = tf = 6ns

17

21

ns

2.0V

75

95

3.0V

27

32

4.5V

15

19

Minimum Pulse Width,

Clock

(Figure 1)

tw

6.0V

tr = tf = 6ns

13

16

ns

2.0V

75

95

3.0V

27

32

4.5V

15

19

Minimum Pulse Width,

Reset

(Figure 2)

tw

6.0V

tr = tf = 6ns

13

16

ns

2.0V

1000

3.0V

800

4.5V

500

Maximum Input Rise

and Fall Times

(Figure 1)

tr, tf

6.0V

tr = tf = 6ns

400

ns

Numéro de pièce similaire - 74HC4060

Fabricant	No de pièce	Fiches technique	Description
NXP Semiconductors	74HC4060	90Kb / 12P	14-stage binary ripple counter with oscillator December 1990
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