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NUC200-VA2N Fiches technique(PDF) 97 Page - Nuvoton Technology Corporation |
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NUC200-VA2N Fiches technique(HTML) 97 Page - Nuvoton Technology Corporation |
97 / 107 page NUC100/120xxxDN Aug 31, 2015 Page 97 of 107 Rev 1.01 -40℃~+85℃; VDD=2.5 V~5.5 V -50 - +50 % Analog Characteristics 8.4 8.4.1 12-bit SARADC Specification SYMBOL PARAMETER MIN. TYP. MAX. UNIT - Resolution - - 12 Bit DNL Differential nonlinearity error - -1~2 -1~4 LSB INL Integral nonlinearity error - ±2 ±4 LSB EO Offset error - ±1 10 LSB EG Gain error (Transfer gain) - 1 1.005 - - Monotonic Guaranteed FADC ADC clock frequency (AVDD = 5V/3V) - - 16/8 MHz FS Sample rate - - 760 kSPS VDDA Supply voltage 3 - 5.5 V IDD Supply current (Avg.) - 0.5 - mA IDDA - 1.5 - mA VREF Reference voltage 3 VDDA V IREF Reference current (Avg.) - 1 - mA VIN Input voltage 0 - VREF V 8.4.2 LDO and Power Management Specification PARAMETER MIN. TYP. MAX. UNIT NOTE Input Voltage VDD 2.5 5.5 V VDD input voltage Output Voltage 1.62 1.8 1.98 V VDD > 2.5 V Operating Temperature -40 25 85 ℃ Cbp - 1 - F RESR = 1 Ω Note: 1. It is recommended that a 10 uF or higher capacitor and a 100 nF bypass capacitor are connected between VDD and the closest VSS pin of the device. 2. To ensure power stability, a 1 F or higher capacitor must be connected between LDO_CAP pin and the closest V SS pin of the device. |
Numéro de pièce similaire - NUC200-VA2N |
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Description similaire - NUC200-VA2N |
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