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NUC220-LE1N Fiches technique(PDF) 83 Page - Nuvoton Technology Corporation |
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NUC220-LE1N Fiches technique(HTML) 83 Page - Nuvoton Technology Corporation |
83 / 107 page NUC100/120xxxDN Aug 31, 2015 Page 83 of 107 Rev 1.01 6.17.2 Features The I 2C bus uses two wires (SDA and SCL) to transfer information between devices connected to the bus. The main features of the bus include: Master/Slave mode Bidirectional data transfer between masters and slaves Multi-master bus (no central master) Arbitration between simultaneously transmitting masters without corruption of serial data on the bus Serial clock synchronization allowing devices with different bit rates to communicate via one serial bus Serial clock synchronization used as a handshake mechanism to suspend and resume serial transfer A built-in 14-bit time-out counter requesting the I 2C interrupt if the I2C bus hangs up and timer-out counter overflows External pull-up resistors needed for high output Programmable clocks allowing for versatile rate control Supports 7-bit addressing mode Supports multiple address recognition (four slave addresses with mask option) |
Numéro de pièce similaire - NUC220-LE1N |
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Description similaire - NUC220-LE1N |
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