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NAU8502YG Fiches technique(PDF) 75 Page - Nuvoton Technology Corporation |
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NAU8502YG Fiches technique(HTML) 75 Page - Nuvoton Technology Corporation |
75 / 92 page NAU8502 emPowerAudio ™ Datasheet Revision 2.5 Page 75 of 92 March, 2014 12.53 REGISTER 0X5B LEFT CHANNEL PCM TIME SLOT START COUNT Bit(s) Addr Parameter Function [8:0] 0x5B TSLOTL[8:0] Left Channel PCM Time Slot Start Count [8:0] 12.54 REGISTER 0X5C PCM AND TIME SLOT CONTROL Bit(s) Addr Parameter Function [8] 0x5C PCMTSEN 0 = Only DSP MODE A or MODE B can be used when FORMT=11 1 = PCM Time Slot Mode is enabled when FORMT=11 [7] 0x5C TRI 0 = not enabled 1 = when ADCDAT_OEN_SEL (0x5C[2])=1 and ADCDAT_OEN(0x5C[5)]=0, 2 nd half of LSB will be Tri-State or pull up / down [6] 0x5C PCM8BIT 0 = use WLEN to select the Word Length 1 = Word Length is 8 bit [5] 0x5C ADCDAT_OEN This bit is only effective when ADCDAT_OEN_SEL(0x5c[2]) = 0 0 = ADCOUT is tri-state or pull up/down before MSB and after LSB 1 = ADCOUT is always driven 1 or 0 by NAU8502 [4] 0x5C ADCDAT_PE 0 = no internal weak pull up / down on ADCOUT 1 = internal weak pull up / down on ADCOUT [3] 0x5C ADCDAT_PS 0 = internal weak pull down on ADCOUT when ADCDAT_PE=1 1 = internal weak pull up on ADCOUT when ADCDAT_PE=1 [2] 0x5C ADCDAT_OEN_SE L 0 = use ADCOUTDIS(0x07[7]) to enable or disable ADCOUT 1 = use ADCDAT_OEN(0x5C[5]) to control ADCOUT driver [1] 0x5C TSLOTR[9] Right Channel PCM Time Slot Start Count [9] [0] 0x5C TSLOTL[9] Left Channel PCM Time Slot Start Count [9] 12.55 REGISTER 0X5D RIGHT CHANNEL PCM TIME SLOT START COUNT Bit(s) Addr Parameter Function [8:0] 0x5D TSLOTR[8:0] Right Channel PCM Time Slot Start Count [8:0] 12.56 REGISTER 0X5E ID REGISTERS Bit(s) Addr Parameter Function [8:0] 0x5E REG_SI_REV Silicon revision set to 0xFE 12.57 REGISTER 0X5F ID REGISTERS Bit(s) Addr Parameter Function [8:0] 0x5F I2C_DEVID I2C device is set to 0x1A when CSB=0 I2C device is set to 0x1B when CSB=1 |
Numéro de pièce similaire - NAU8502YG |
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Description similaire - NAU8502YG |
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